ZL50057 ZARLINK [Zarlink Semiconductor Inc], ZL50057 Datasheet - Page 95
ZL50057
Manufacturer Part Number
ZL50057
Description
12 K-Channel Digital Switch with High Jitter Tolerance, Per Stream Rate Conversion (2, 4, 8, 16, or 32 Mbps), and 48 Inputs and 48 Outputs
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
1.ZL50057.pdf
(108 pages)
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CK_int *
(244 ns)
(122 ns)
(244 ns)
(122 ns)
(122 ns)
Note *: CK_int is the internal clock signal of 131.072 MHz
Note **: Although the figures above show the frame boundary as measured from the rising edge of C8i/C8o/C16o, the
frame-controlling edge of C8i/C8o/C16o may be the rising edge, as configured via the C8iPOL and COPOL bits of the
Control Register.
(61 ns)
FP16o
FP16o
FP8o
FP8o
C16o
FP8i
FP8i
C8o
C8i
Figure 28 - Input and Output Clock Timing Diagram for GCI-Bus
t
OCH16
t
ICL
t
OCL8
t
FPFB16_61
t
OCL16
t
IFPS122
t
t
FPFBF16_122
t
t
OFPW16_61
OFBOS
FPFBF8_122
t
ICH
t
OCH8
Zarlink Semiconductor Inc.
ZL50057/8
t
IFPS244
t
t
t
t
IFPW122
FPFBF8_244
OFPW8_122
OFPW16_122
95
t
FBFP16_61
t
t
FBFPF16_122
IFPH122
t
FBFPF8_122
t
IFPW244
t
t
OFPW8_244
ICP
t
OCP8
t
rIC
t
fOC16
t
rOC8
t
OCP16
t
FBFPF8_244
t
IFPH244
t
t
rOC16
fIC
t
fOC8
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