MT093AE ZARLINK [Zarlink Semiconductor Inc], MT093AE Datasheet - Page 3

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MT093AE

Manufacturer Part Number
MT093AE
Description
8 x 12 Analog Switch Array
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet

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Pin Description
Functional Description
The MT093 is an analog switch matrix with an array
size of 8 x 12. The switch array is arranged such that
there are 8 columns by 12 rows. The columns are
referred to as the Y input/output lines and the rows
are the X input/output lines. The crosspoint analog
switch array will interconnect any X line with any Y
line when turned on and provide a high degree of
isolation when turned off. The control memory
consists of a 96 bit write only RAM in which the bits
are selected by the address input lines (AY0-AY2,
AX0-AX3). Data is presented to the memory on the
DATA input line. Data is asynchronously written into
memory whenever the STROBE input is high and is
latched on the falling edge of STROBE. A logical “1”
written into a memory cell turns the corresponding
crosspoint switch on and a logical “0” turns the
crosspoint
corresponding to the addressed memory location are
altered when data is written into memory. The
remaining switches retain their previous states. Any
combination of X and Y lines can be interconnected
by establishing appropriate patterns in the control
memory. A logical “1” on the RESET input line will
asynchronously return all memory locations to
logical “0” turning off all crosspoint switches.
PDIP
38
39
40
Pin #
PLCC
off.
42
43
44
Only
Name
DATA
V
Y2
DD
the
DATA (Input) : a logic high input will turn on the selected switch and a logic low will
turn off the selected switch. Active High.
Y2 Analog (Input/Output) : this is connected to the Y2 column of the switch
array.
Positive Power Supply.
crosspoint
switches
Address Decode
The seven address lines along with the STROBE
input are logically ANDed to form an enable signal
for
input is buffered and is used as the input to all
latches. To write to a location, RESET must be low
while the address and data lines are set up. Then the
STROBE input is set high and then low causing the
data to be latched. The data can be changed while
STROBE is high, however, the corresponding switch
will turn on and off in accordance with the data. Data
must be stable on the falling edge of STROBE in
order for correct data to be written to the latch.
the resettable transparent latches. The DATA
Description
ISO-CMOS
MT093
3-67

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