9DB102BFILF IDT [Integrated Device Technology], 9DB102BFILF Datasheet - Page 9

• Manufacturer Part Number: 9DB102BFILF
• Description: Two Output Differential Buffer for PCIe Gen1 & Gen2
• Manufacturer: IDT [Integrated Device Technology]

IDT
SMBus Table: Device Control Register, READ/WRITE ADDRESS (D4/D5)
SMBus Table: Output Enable Register
SMBus Table: Function Select Register
SMBus Table: Vendor & Revision ID Register
ICS9DB102
Two Output Differential Buffer for PCIe Gen1 & Gen2
®
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Two Output Differential Buffer for PCIe Gen1 & Gen2
Byte 0
Byte 1
Byte 2
Byte 3
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Pin #
Pin #
Pin #
Pin #
PLL BW #adjust
PLL Enable
SW_EN
Name
Name
Name
Name
RID3
RID2
RID1
RID0
VID3
VID2
VID1
VID0
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
Control Function Type
Bypasses PLL for
Control Function Type
Control Function Type
Control Function Type
Enables SMBus
REVISION ID
VENDOR ID
Selects PLL
Bandwidth
board test
Control
9
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
R
R
R
R
R
R
R
R
(fan out mode)
PLL bypassed
controlled by
Functions
registers
Low BW
SMBus
0
0
0
0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
controlled by
PLL enabled
(ZDB mode)
device pins
Functions
High BW
1
1
1
1
-
-
-
-
-
-
-
-
PWD
PWD
PWD
PWD
852
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
1
1
0
0
0
1
0
0
0
1
REV K 04/01/10