9DB106 IDT [Integrated Device Technology], 9DB106 Datasheet - Page 9

• Manufacturer Part Number: 9DB106
• Description: Six Output Differential Buffer for PCIe Gen 2
• Manufacturer: IDT [Integrated Device Technology]

IDT
9DB106
Six Output Differential Buffer for PCIe Gen 2
®
How to Write:
• Controller (host) sends a start bit.
• Controller (host) sends the write address D4
• IDT clock will acknowledge
• Controller (host) sends the begining byte location = N
• IDT clock will acknowledge
• Controller (host) sends the data byte count = X
• IDT clock will acknowledge
• Controller (host) starts sending Byte N through
• IDT clock will acknowledge each byte one at a time
• Controller (host) sends a Stop bit
Six Output Differential Buffer for PCIe Gen 2
Byte N + X -1)
WR
P
T
Beginning Byte N
Data Byte Count = X
Index Block Write Operation
Beginning Byte = N
Slave Address D4
Byte N + X - 1
Controller (Host)
General SMBus serial interface information for the 9DB106
starT bit
stoP bit
WRite
(h)
IDT (Slave/Receiver)
ACK
ACK
ACK
ACK
ACK
(h)
9
How to Read:
• Controller (host) will send start bit.
• Controller (host) sends the write address D4
• IDT clock will acknowledge
• Controller (host) sends the begining byte
• IDT clock will acknowledge
• Controller (host) will send a separate start bit.
• Controller (host) sends the read address D5
• IDT clock will acknowledge
• IDT clock will send the data byte count = X
• IDT clock sends Byte N + X -1
• IDT clock sends Byte 0 through byte X (if X
• Controller (host) will need to acknowledge each byte
• Controllor (host) will send a not acknowledge bit
• Controller (host) will send a stop bit
location = N
was written to byte 8)
WR
RD
RT
N
P
T
Index Block Read Operation
Beginning Byte = N
Slave Address D4
Slave Address D5
Controller (Host)
Not acknowledge
ACK
ACK
Repeat starT
starT bit
stoP bit
WRite
ReaD
(h)
(h)
.
IDT (Slave/Receiver)
Data Byte Count = X
9DB106
Beginning Byte N
Byte N + X - 1
ACK
ACK
ACK
REV K 04/20/11
(h)
(h)
(h)