TXC-02050CIPL ETC1 [List of Unclassifed Manufacturers], TXC-02050CIPL Datasheet - Page 25

• Manufacturer Part Number: TXC-02050CIPL
• Description: MRT Device 6-,8-,34-Mbit Line Interface TXC-0250C
• Manufacturer: ETC1 [List of Unclassifed Manufacturers]

Maximum Output Jitter In Absence of Input Jitter
ITU-T Recommendation G.823 specifies that it is necessary to restrict the amount of jitter generated by individ-
ual equipment at an output port. The amount of jitter allowed is dependent on the application in which the
equipment is used. For example, in a repeater application the recovered clock will be used for the transmit
clock. The recovered clock will have jitter due to the sending transmitter and to clock recovery of distorted data.
The jitter will be additive through each repeater. Therefore, it would be necessary to add a dejitter buffer (a PLL
with a very low bandwidth, usually using a VCXO) to reduce the jitter in the recovered clock before using it as a
transmit clock.
For the MRT in non-repeater applications, the maximum output jitter measurement is made on the transmit
path. The recovered clock output jitter is unimportant as long as proper clocking of following devices in possible
(with the exception of the above-mentioned repeater applications). The transmit clock in these cases is coming
from a device such as a framer whose clock is derived from the local oscillator on the board. To make this mea-
surement, apply a signal with known jitter characteristics to the transmitter inputs and measure the jitter at the
transmitter outputs.
In the absence of applied jitter, the transmit path of the MRT introduces a maximum 0.05 Unit Intervals (UIs)
peak-to-peak jitter over the following frequency ranges:
This operation is with the MRT terminated by the external components (and component values) specified in the
Pin Description Table for pin 7 (VCOC), pin 17 (PLLC), and pin 22 (AGFIL).
Jitter Transfer
Transfer of jitter through individual equipment is characterized by the relationship between the applied input jit-
ter and the resulting output jitter as a function of frequency. ITU-T Recommendation G.823 specifies that it is
important to restrict jitter gain. Figure 4 of G.823 shows a typical jitter transfer characteristic. Note that a small
jitter gain is allowed. British Standard 6328: Section 8.1, 1990 gives the allowable gain as 0.5 dB.
With applied input jitter at the MRT receive input terminals, the maximum MRT receive output jitter is not
greater than the level of input jitter plus a maximum of 0.05 UI peak-to-peak jitter in the range of 10 Hz to 160
kHz for 6 Mbit/s, 20 Hz to 400 kHz for 8 Mbit/s, and 100 Hz to 800 kHz for 34 Mbit/s. These values are mea-
sured by applying a controlled, sinusoidal jitter signal to pins DI1 and DI2, then measuring the jitter at the
receiver output (i.e., CLKO).
This operation is with the same MRT external terminations as described in the Maximum Output Jitter section
above.
Interfering Tone Tolerance
The MRT will properly recover clock and present error-free output to the receive terminal side interface in the
presence of a PRBS interfering tone with the same data sequence as the data input while operating at 6, 8 or
34 Mbit/s, as specified in the following table:
At 6.312 Mbit/s: 10 Hz to 160 kHz
At 8448 kbit/s: 20 Hz to 400 kHz
At 34368 kbit/s: 100 Hz to 800 kHz
Proprietary TranSwitch Corporation Information for use Solely by its Customers
DATA SHEET
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TXC-02050C
TXC-02050C-MB
Ed. 1, May 2002
MRT