AT86RF230_09 ATMEL [ATMEL Corporation], AT86RF230_09 Datasheet - Page 59
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AT86RF230_09
Manufacturer Part Number
AT86RF230_09
Description
Low Power 2.4 GHz Transceiver for ZigBee, IEEE 802.15.4, 6LoWPAN, RF4CE and ISM
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT86RF230_09.pdf
(98 pages)
- Current page: 59 of 98
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9.2.2 Configuration
9.2.3 Register Description
5131E-MCU Wireless-02/09
Bit
0x05
Read/Write
Reset value
Bit
0x05
Read/Write
Reset value
connected to bidirectional differential antenna pins (RFP, RFN), so that no external
antenna switch is needed.
In Basic Operating Mode a transmission is started from PLL_ON state by either writing
TX_START to register bits TRX_CMD (register 0x02, TRX_STATE) or by raising edge
of SLP_TR.
In Extended Operating Modes a transmission is started automatically dependent on the
transaction phase of either RX_AACK or TX_ARET, refer to section 7.2.
The RF output power can be set via register bits TX_PWR in register 0x05
(PHY_TX_PWR). The maximum output power of the transmitter is typical +3 dBm. The
selectable output power range of the transmitter is 20 dB.
Register 0x05 (PHY_TX_PWR)
The PHY_TX_PWR register sets the transmit power and controls the FCS algorithm for
TX operation.
• Bit 7 – TX_AUTO_CRC_ON
Refer to sections 7.2.6 and 8.2.
• Bit [6:4] – Reserved
• Bit [3:0] – TX_PWR
The register bits TX_PWR sets the TX output power of the AT86RF230. The available
power settings are summarized in Table 9-1.
Table 9-1. PA Output Power Setting
Register Bits
TX_PWR
TX_AUTO_CRC_ON
R/W
R/W
3
0
7
0
Value [3:0]
0xA
0x0
0x1
0x2
0x3
0x4
0x5
0x6
0x7
0x8
0x9
R/W
2
0
R
6
0
TX_PWR
Reserved
R/W
1
0
R
5
0
Output Power [dBm]
+3.0
+2.6
+2.1
+1.6
+1.1
+0.5
-0.2
-1.2
-2.2
-3.2
-4.2
R/W
AT86RF230
0
0
R
4
0
PHY_TX_PWR
PHY_TX_PWR
59
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