L-FW323-06-DB AGERE [Agere Systems], L-FW323-06-DB Datasheet - Page 75

• Manufacturer Part Number: L-FW323-06-DB
• Description: PCI PHY/Link Open Host Controller Interface
• Manufacturer: AGERE [Agere Systems]

Data Sheet, Rev. 1
December 2005
Internal Register Configuration
PHY Core Register Map
The PHY Core register map is shown below in Table 65.
Reference:
Table 65. PHY Core Register Map
Agere Systems Inc.
Address
0000
0001
0010
0011
0100
0101
0110
0111
1000
1111
2
2
2
2
2
2
2
2
2
2
XXXXX XXXXX XXXXX XXXXX XXXXX XXXXX XXXXX XXXXX
Watchdog
IEEE Standard 1394a-2000, Annex J2
RHB
LCtrl
Bit 0
Extended (7)
Page_select
Max_speed
Contender
ISBR
Bit 1
IBR
REQUIRED
Loop
Bit 2
Physical_ID
XXXXX
XXXXX
XXXXX
XXXXX
Pwr_fail
Register 0
Register 7
Jitter
Bit 3
PCI PHY/Link Open Host Controller Interface
Contents
Page_select
Page_select
Timeout
Bit 4
RESERVED
Gap_count
Port_event Enab_accel Enab_multi
Bit 5
Port_select
Total_ports
Delay
Pwr_class
Bit 6
FW323 06 1394a
R
Bit 7
PS
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