IDT728981J IDT, Integrated Device Technology Inc, IDT728981J Datasheet - Page 2

• Manufacturer Part Number: IDT728981J
• Description: IC DGTL SW 256X256 44-PLCC
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: 7200r
• Type: Multiplexerr

Specifications of IDT728981J

• Circuit: 1 x 4:4
• Independent Circuits: 1
• Voltage Supply Source: Single Supply
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 44-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Current - Output High, Low: -
• Lead Free Status / RoHS Status: Not Compliant, Contains lead / RoHS non-compliant
• Other names: 728981J

NOTE:
1. DNC - Do Not Connect
SYMBOL
IDT728981 Time Slot Interchange
Digital Switch 128 x 128
GND
V
DTA
RX0-3
F0i
C4i
A0-A5
DS
R/W
CS
D0-D7
TX0-3
ODE
CC
INDEX
RX3
V
V
V
V
V
C4i
F0i
A
A
A
CC
CC
CC
CC
CC
0
1
2
PLCC: 0.05in. pitch, 0.65in. x 0.65in.
Ground.
V
Data Acknowledgment
(Open Drain)
RX Input 0 to 3
Frame Pulse
Clock
Address 0 to 5
Data Strobe
Read/Write
Chip Select
Data Bus 0 to 7
TX Outputs 0 to 3
(Three-state Outputs)
Output Drive Enable
CC
10
11
12
13
14
15
16
17
7
8
9
(J44-1, order code: J)
NAME
TOP VIEW
I/O
I/O These pins provide microprocessor access to data in the internal control register. Connection Memory HIGH,
O
O
I
I
I
I
I
I
I
I
39
38
37
36
35
34
33
32
31
30
29
Active LOW input enabling a microprocessor read or write of control register or internal memories.
Serial data output streams. These streams are composed of 32, 64 Kbit/s channels at data rates of 2.048 Mb/s.
This is an output enable for the TX0-3 serial outputs. If this input is LOW, TX0-3 are high-impedance. If this is
Ground Rail.
+5.0 Volt Power Supply.
This active LOW output indicates that a data bus transfer is complete. A pull-up resistor is required at this
output.
Serial data input streams. These streams have 32 channels at data rates of 2.048 Mb/s.
This input identifies frame synchronization signals formatted to ST-BUS
4.096 MHz serial clock for shifting data in and out of the data streams.
These lines provide the address to IDT728981 internal registers.
This is the input for the active HIGH data strobe on the microprocessor interface. This input operates with
CS to enable the internal read and write generation.
This input controls the direction of the data bus lines (D0-D7) during a microprocessor access.
Connection Memory LOW and data memory.
HIGH, each channel may still be put into high-impedance by software control.
5703 drw02
TX3
DNC
DNC
DNC
DNC
GND
D
D
D
D
D
0
1
2
3
4
(1)
(1)
(1)
(1)
DTA
RX0
RX1
RX2
RX3
V
V
V
V
V
R/W
PLASTIC DIP: 0.10in. pitch, 2.05in. x 0.60in.
C4i
DS
CC
CC
CC
CC
CC
F0i
A
A
A
A
A
A
0
1
2
3
4
5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
(P40-1, order code: P)
TOP VIEW
2
5703 drw04
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
DESCRIPTION
DNC
ODE
TX0
TX1
TX2
TX3
GND
D
D
D
D
D
D
D
D
CS
DNC
DNC
DNC
DNC
0
1
2
3
4
5
6
7
(1)
(1)
(1)
(1)
(1)
INDEX
RX3
V
V
V
V
V
C4i
F0i
CC
CC
CC
CC
CC
A
A
A
0
1
2
PQFP: 0.80mm pitch, 10mm x 10mm
1
2
3
4
5
6
7
8
9
10
11
C
(DB44-1, order code: DB)
®
ommercial Temperature Range
specifications.
TOP VIEW
33
32
31
30
29
28
27
26
25
24
23
5703 drw03
TX3
GND
D
D
D
D
D
DNC
DNC
DNC
DNC
0
1
2
3
4
(1)
(1)
(1)
(1)