XE1203 ETC1 [List of Unclassifed Manufacturers], XE1203 Datasheet - Page 10

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XE1203

Manufacturer Part Number
XE1203
Description
Low-Power, integrated UHF transceiver
Manufacturer
ETC1 [List of Unclassifed Manufacturers]
Datasheet

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4.1.5
The output of the demodulator has glitches and jitters. The bit synchronizer transforms the data output of the
demodulator into a glitch-free bit stream DATA and generates a synchronized clock DCLK to be used for sampling
the DATA output (see below).
To ensure proper behaviour of the bit synchronizer, three conditions have to be satisfied: A preamble of 24 bits is
required for the synchronization; this preamble must be a sequence of “0” and “1” sent alternatively, during
transmission of data, the bit stream must have at least one transition from “0” to “1” or from “1” to “0” every 8 bits.
The accuracy of the bit rate must be better than
FSParam_BR defines the bit rate in the following way.
where int(x) is the
If the Konnex standard is used then the bit rate is fixed and equal to 32.77 Kbps. The register FSParam_OSR
(address “00101” ) has to be set to “00011110” , the register FSParam_BR(6:0) has to be set to “000X0000” and
the bit FSPARAM_Change_Osr has to be set to ‘1’.^
10
Bit synchronizer
DCLK
DATA
(NRZ)
integer value of the unsigned binary representation of x.
Figure 2. Bit synchronizer timing diagram.
Bit rate =
int(FSPara
5 %. The bit synchronizer is on when RTParam_Bsync is high.
152
m_BR(6
.
34
e
3
:
0))
1
,
Data Sheet
XE1203
D0308-214

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