AT52BC6402A-85CI ATMEL [ATMEL Corporation], AT52BC6402A-85CI Datasheet - Page 20
AT52BC6402A-85CI
Manufacturer Part Number
AT52BC6402A-85CI
Description
64 MBIT FLASH 16 MBIT PSRAM
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT52BC6402A-85CI.pdf
(38 pages)
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AC Asynchronous Read Timing Characteristics
Asynchronous Read Cycle Waveform
Notes:
20
Symbol
t
t
t
t
t
ACC
CE
OE
DF
RO
1. CE may be delayed up to t
2. OE may be delayed up to t
3. t
AT52BC6402A(T)
without impact on t
DF
is specified from OE or CE, whichever occurs first (CL = 5 pF).
Parameter
Access, Address to Data Valid
Access, CE to Data Valid
OE to Data Valid
CE, OE High to Data Float
RESET to Output Delay
ACC
.
ACC
CE
I/O0 - I/O15
A0 - A21
- t
RESET
- t
OE
CE
OE
CE
after the falling edge of CE without impact on t
after the address transition without impact on t
Min
HIGH Z
tACC
64-Mbit-70
tRO
(1)(2)(3)
ADDRESS VALID
tCE
tOE
tRC
Max
150
70
70
20
25
OUTPUT
VALID
tOH
tDF
Min
CE
ACC
64-Mbit-85
or by t
.
ACC
- t
Max
150
OE
85
85
20
25
after an address change
3441B–STKD–11/04
Units
ns
ns
ns
ns
ns
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