K4D263238M-QC45 SAMSUNG [Samsung semiconductor], K4D263238M-QC45 Datasheet - Page 5
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K4D263238M-QC45
Manufacturer Part Number
K4D263238M-QC45
Description
1M x 32Bit x 4 Banks Double Data Rate Synchronous RAM with Bi-directional Data Strobe and DLL
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet
1.K4D263238M-QC45.pdf
(19 pages)
K4D263238M
PIN CONFIGURATION
PIN DESCRIPTION
CK,CK
CKE
CS
RAS
CAS
WE
DQS
DMi
RFU
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
DQ29
DQ30
DQ31
DQS
RFU
VDD
DQ0
DQ1
DQ2
VSS
N.C
N.C
N.C
N.C
N.C
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
Data Strobe
Differential Clock Input
Clock Enable
Chip Select
Row Address Strobe
Column Address Strobe
Write Enable
Data Mask
Reserved for Future Use
(Top View)
0.65mm pin Pitch
100 Pin TQFP
20 x 14 mm
- 5 -
BA
A
DQ
V
V
V
V
MCL
0
DD
SS
DDQ
SSQ
2
0
~A
0
, BA
~ DQ
11
1
31
128M DDR SDRAM
Bank Select Address
Data Input/Output
Power
Ground
Power for DQ s
Ground for DQ s
Must Connect Low
Address Input
Rev. 1.3 (Aug. 2001)
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
A7
A6
A5
A4
VSS
A9
N.C
N.C
N.C
N.C
N.C
N.C
N.C
A11
A10
VDD
A3
A2
A1
A0