IC42S32202-6B ICSI [Integrated Circuit Solution Inc], IC42S32202-6B Datasheet - Page 15
IC42S32202-6B
Manufacturer Part Number
IC42S32202-6B
Description
512K x 32 Bit x 4 Banks (64-MBIT) SDRAM
Manufacturer
ICSI [Integrated Circuit Solution Inc]
Datasheet
1.IC42S32202-6B.pdf
(62 pages)
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IC42S32202/L
Integrated Circuit Solution Inc.
DR042-0C 08/17/2004
7
Mode Register Set command
(RAS#=”L”,CAS#=”L”,WE#=”L”,BS0,1 and A10-A0 =Register Data)
The mode register stores the data for controlling the various operating modes of SDRAM.The
ter Set command programs the values of CAS#latency,Addressing Mode and Burst Length in the Mode register
to make SDRAM useful for a variety of different applications.The default values of the Mode Register after power-
up are undefined;therefore this command must be issued at the power-up sequence.The state of pins BS0,1 and
A10~A0 in the same cycle is the data written to the mode register.One clock cycle is required to complete the write
in the mode register (refer to the following figure).The contents of the mode register can be changed using the
same command and the clock cycle requirements during operation as long as all banks are in the idle state.
Mode Regis-
15
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