IC42S32202-6B ICSI [Integrated Circuit Solution Inc], IC42S32202-6B Datasheet - Page 52
IC42S32202-6B
Manufacturer Part Number
IC42S32202-6B
Description
512K x 32 Bit x 4 Banks (64-MBIT) SDRAM
Manufacturer
ICSI [Integrated Circuit Solution Inc]
Datasheet
1.IC42S32202-6B.pdf
(62 pages)
- Current page: 52 of 62
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IC42S32202/L
Figure 18.2.Full Page Read Cycle (Burst Length=Full Page,CAS#Latency=2)
52
BS0,1
CAS#
A0-A9
DQM
RAS#
WE#
CKE
CS#
CLK
A10
DQ
Hi-Z
High
Command
Activate
Bank A
RAx
RAx
T0 T 1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T 11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
t
Command
Bank A
CK2
Read
CAx
Command
Activate
Bank B
RBx
RBx
Ax
Ax+1 Ax+2 Ax-2 Ax- 1
The burst counter wraps
from the highest order
page address back to zero
during this time interval
Command
Bank B
Read
CBx
Ax
Ax+1 Bx
Full Page burst operation does not
term in ate when the burst length is sat is fied;
the burst counter increments and continues
bursting beginning with the starting address.
Bx+1
B
x+2
Bx+3 Bx+4
Burst Stop
Command
Bx+5
Precharge
Command
Bank B
Integrated Circuit Solution Inc.
Bx+6
t
RP
Command
Activate
Bank B
RBy
RBy
DR042-0C 08/17/2004
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