SSD1828Z ETC [List of Unclassifed Manufacturers], SSD1828Z Datasheet - Page 26

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SSD1828Z

Manufacturer Part Number
SSD1828Z
Description
LCD Segment / Common Driver with Controller CMOS
Manufacturer
ETC [List of Unclassifed Manufacturers]
Datasheet

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Table 8 - Read Status Byte
Bit Pattern
BUSY ON RES 0
1000
Table 9 - Address Increment Table
Table 10 - Commands Required for R/W (WR#) Actions on RAM
R/W (WR) Actions on RAMs
Read/write Data from/to GDDRAM
* No need to resend the command again if it is set previously.
The read / write action to the Display Data RAM does not depend on the display mode. This means the
user can change the RAM content whether the target RAM content is being displayed or not.
SSD1828
7.14 Read Status Byte
A 8 bits status byte will be placed to the data bus if a read operation is performed if D/C is low. The
status byte is defined as follow.
7.15 Data Read / Write
To read data from the GDDRAM, input High to R/W(WR#) pin and D/C pin for 6800-series parallel
mode. Low to E(RD#) pin and High to D/C pin for 8080-series parallel mode. No data read is provided
for serial mode. In normal mode, GDDRAM column address pointer will be increased by one
automatically after each data read. Also, a dummy read is required before the first data is read. See
Figure 3 in Functional Description.
To write data to the GDDRAM, input Low to R/W(WR#) pin and High to D/C pin for 6800-series
parallel mode. For serial interface, it will always be in write mode. GDDRAM column address pointer
will be increased by one automatically after each data write. The address will be reset to 0 in next data
read/write operation is executed when it is 95.
D/C
Address Increment is done automatically after data read/write. The column address pointer of
GDDRAM is also affected. It will be reset to 0 in next data read/write operation is executed when it is
95.
0
0
1
1
R/W (WR)
0
1
0
1
Rev 1.10
07/2002
Command
Read Status
Write Command
Read Status
Write Data
Read Data
Comment
Commands Required
Set GDDRAM Page Address
Set GDDRAM Column Address
Read/Write Data
Address Increment
Comment
BUSY=0: Chip is idle
BUSY=1: Chip is executing instruction
ON=0: Display is OFF
ON=1: Display is ON
RES=0: Chip is idle
RES=1: Chip is executing reset
Yes
Yes
No
No
(1011X
(0001X
(0000X
(X
7
X
6
X
5
3
3
3
X
X
X
X
4
2
2
2
X
X
X
X
3
1
1
1
X
X
X
X
2
0
0
0
X
)*
)*
)*
1
X
0
)
SOLOMON
21

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