M368L1624FTM-CB3AA SANKEN [Sanken electric], M368L1624FTM-CB3AA Datasheet - Page 16
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M368L1624FTM-CB3AA
Manufacturer Part Number
M368L1624FTM-CB3AA
Description
184pin Unbuffered Module based on 256Mb F-die with 64/72-bit Non-ECC / ECC
Manufacturer
SANKEN [Sanken electric]
Datasheet
1.M368L1624FTM-CB3AA.pdf
(25 pages)
System Characteristics for DDR SDRAM
The following specification parameters are required in systems using DDR333& DDR266 devices to ensure proper system
performance. these characteristics are for system simulation purposes and are guaranteed by design.
Table 1 : Input Slew Rate for DQ, DQS, and DM
Table 2 : Input Setup & Hold Time Derating for Slew Rate
Table 3 : Input/Output Setup & Hold Time Derating for Slew Rate
256MB, 512MB Unbuffered DIMM
PARAMETER
DQ/DM/DQS input slew rate measured between
VIH(DC), VIL(DC) and VIL(DC), VIH(DC)
Mode register set cycle time
DQ & DM setup time to DQS
DQ & DM hold time to DQS
Control & Address input pulse width
DQ & DM input pulse width
Power down exit time
Exit self refresh to non-Read command
Exit self refresh to read command
Refresh interval time
Output DQS valid window
Clock half period
Data hold skew factor
DQS write postamble time
Active to Read with Auto precharge
command
Autoprecharge write recovery +
Precharge time
Input Slew Rate
Input Slew Rate
0.5 V/ns
0.4 V/ns
0.3 V/ns
0.5 V/ns
0.4 V/ns
0.3 V/ns
AC CHARACTERISTICS
Parameter
+100
+150
+50
tDS
+75
tIS
0
0
Symbol
tPDEX
tXSNR
tXSRD
tWPST
tDIPW
tMRD
tREFI
tQHS
tRAP
tIPW
tDAL
tDH
tQH
tDS
tHP
+150
tDH
+75
tIH
0
0
0
0
(DDR333@CL=2.5))
or tCHmin
(tWR/tCK)
(tRP/tCK)
tCLmin
-tQHS
0.45
Min
0.45
1.75
200
tHP
2.2
0.4
12
75
18
6
+
DCSLEW
SYMBOL
B3
Units
Units
ps
ps
ps
ps
ps
ps
Max
0.55
7.8
0.6
-
-
TBD
MIN
DDR333
(tWR/tCK)
(DDR266@CL=2.0)
or tCHmin
(tRP/tCK)
tCLmin
-tQHS
1.75
tHP
200
0.5
0.5
2.2
7.5
0.4
15
75
20
+
Notes
Notes
MAX
TBD
AA
k
k
k
i
i
i
0.75
7.8
0.6
-
-
TBD
MIN
DDR266
(DDR266@CL=2.0)
or tCHmin
(tWR/tCK)
(tRP/tCK)
tCLmin
-tQHS
Min
1.75
200
tHP
0.5
0.5
2.2
7.5
0.4
15
75
20
+
MAX
TBD
A2
Max
0.75
7.8
0.6
-
-
Units
V/ns
(DDR266@CL=2.5))
or tCHmin
(tWR/tCK)
(tRP/tCK)
tCLmin
-tQHS
1.75
Rev. 1.2 May, 2004
Min
200
tHP
0.5
0.5
2.2
7.5
0.4
15
75
20
+
Notes
a, m
B0
DDR SDRAM
Max
0.75
7.8
0.6
-
-
Unit
tCK
tCK
tCK
ns
ns
ns
ns
ns
ns
ns
us
ns
ns
ns
10, 11
Note
j, k
j, k
13
11
11
8
8
4
2