M368L2923DUN-CB3 SAMSUNG [Samsung semiconductor], M368L2923DUN-CB3 Datasheet - Page 15

• Manufacturer Part Number: M368L2923DUN-CB3
• Description: DDR SDRAM Unbuffered Module 184pin Unbuffered Module based on 512Mb D-die with 64/72-bit Non ECC/ECC 66 TSOP-II with Pb-Free (RoHS compliant)
• Manufacturer: SAMSUNG [Samsung semiconductor]

10.0 AC Operating Conditions
Note :
1. VID is the magnitude of the difference between the input level on CK and the input on CK.
2. The value of V
3. These parameters should be tested at the pim on actual components and may be checked at either the pin or the pad in
11.0 Input/Output Capacitance
Input capacitance(A0 ~ A12, BA0 ~ BA1,RAS,CAS,WE )
Input capacitance(CKE0)
Input capacitance( CS0)
Input capacitance( CLK0, CLK1,CLK2)
Input capacitance(DM0~DM7, DM8(for ECC))
Data & DQS input/output capacitance(DQ0~DQ63)
Data input/output capacitance (CB0~CB7)
Input capacitance(A0 ~ A12, BA0 ~ BA1,RAS,CAS,WE )
Input capacitance(CKE0,CKE1)
Input capacitance( CS0, CS1)
Input capacitance( CLK0, CLK1,CLK2)
Input capacitance(DM0~DM7, DM8(for ECC))
Data & DQS input/output capacitance(DQ0~DQ63)
Data input/output capacitance (CB0~CB7)
256MB, 512MB, 1GB Unbuffered DIMM
simulation. the AC and DC input specificatims are refation to a Vref envelope that has been bandwidth limited 20MHz.
Input High (Logic 1) Voltage, DQ, DQS and DM signals
Input Low (Logic 0) Voltage, DQ, DQS and DM signals.
Input Crossing Point Voltage, CK and CK inputs
Input Differential Voltage, CK and CK inputs
IX
is expected to equal 0.5*V
Parameter/Condition
Parameter
Parameter
Output
DDQ
of the transmitting device and must track variations in the DC level of the same.
Output Load Circuit (SSTL_2)
Z0=50Ω
Symbol
Symbol
C
Cout1
Cout2
Cout1
Cout2
CIN1
CIN2
CIN3
CIN4
CIN5
CIN1
CIN2
CIN3
CIN4
CIN5
LOAD
=30pF
V
tt
VIH(AC)
VID(AC)
VIX(AC)
Symbol
VIL(AC)
=0.5*V
M368L3324DUS
Min
41
34
34
25
6
6
-
Min
65
42
42
28
10
10
M368L2923DUN
-
R
DDQ
T
=50Ω
0.5*VDDQ-0.2
Max
VREF + 0.31
V
=0.5*V
45
38
38
30
7
7
-
REF
Min
0.7
DDQ
Max
81
50
50
34
12
12
M368L6523DUS
-
(VDD=2.5V, VDDQ=2.5V, TA= 25°C, f=1MHz)
Min
49
42
42
25
6
6
-
0.5*VDDQ+0.2
VREF - 0.31
VDDQ+0.6
Max
57
50
50
30
7
7
-
Max
Min
44
69
44
28
10
10
10
M381L2923DUM
Rev. 0.1 June 2005
M381L6523DUM
Min
51
44
44
25
DDR SDRAM
6
6
6
Unit
Max
87
53
53
34
12
12
12
V
V
V
V
Max
60
53
53
30
7
7
7
Note
Unit
Unit
3
3
1
2
pF
pF
pF
pF
pF
pF
pF
pF
pF
pF
pF
pF
pF
pF