M368L2923DUN-CB3 SAMSUNG [Samsung semiconductor], M368L2923DUN-CB3 Datasheet - Page 17

• Manufacturer Part Number: M368L2923DUN-CB3
• Description: DDR SDRAM Unbuffered Module 184pin Unbuffered Module based on 512Mb D-die with 64/72-bit Non ECC/ECC 66 TSOP-II with Pb-Free (RoHS compliant)
• Manufacturer: SAMSUNG [Samsung semiconductor]

13.0 System Characteristics for DDR SDRAM
The following specification parameters are required in systems using DDR333 devices to ensure proper system performance. these
characteristics are for system simulation purposes and are guaranteed by design.
Table 1 : Input Slew Rate for DQ, DQS, and DM
Table 2 : Input Setup & Hold Time Derating for Slew Rate
Table 3 : Input/Output Setup & Hold Time Derating for Slew Rate
Table 4 : Input/Output Setup & Hold Derating for Rise/Fall Delta Slew Rate
Table 5 : Output Slew Rate Characteristice (X4, X8 Devices only)
Table 6 : Output Slew Rate Characteristice (X16 Devices only)
Table 7 : Output Slew Rate Matching Ratio Characteristics
256MB, 512MB, 1GB Unbuffered DIMM
PARAMETER
DQ/DM/DQS input slew rate measured between
VIH(DC), VIL(DC) and VIL(DC), VIH(DC)
PARAMETER
Output Slew Rate Matching Ratio (Pullup to Pulldown)
Slew Rate Characteristic
Slew Rate Characteristic
Input Slew Rate
Input Slew Rate
Delta Slew Rate
+/- 0.25 V/ns
+/- 0.0 V/ns
+/- 0.5 V/ns
Pullup Slew Rate
Pullup Slew Rate
0.5 V/ns
0.4 V/ns
0.3 V/ns
0.5 V/ns
0.4 V/ns
0.3 V/ns
Pulldown slew
Pulldown slew
AC CHARACTERISTICS
AC CHARACTERISTICS
+100
∆tDS
+150
∆tDS
+100
∆tIS
+50
+75
+50
0
0
0
Typical Range
Typical Range
1.2 ~ 2.5
1.2 ~ 2.5
1.2 ~ 2.5
1.2 ~ 2.5
(V/ns)
(V/ns)
∆tDH
∆tDH
+150
+100
∆tIH
+75
+50
0
0
0
0
0
Minimum
Minimum
(V/ns)
(V/ns)
1.0
1.0
0.7
0.7
SYMBOL
DCSLEW
TBD
MIN
DDR400
Units
Units
Units
ps
ps
ps
ps
ps
ps
ps
ps
ps
Maximum
Maximum
MAX
TBD
TBD
MIN
(V/ns)
(V/ns)
4.5
4.5
5.0
5.0
DDR400
Notes
Notes
Notes
TBD
MIN
MAX
TBD
k
k
k
i
i
i
j
j
j
DDR333
a,c,d,f,g,h
b,c,d,f,g,h
a,c,d,f,g,h
b,c,d,f,g,h
Notes
Notes
MAX
TBD
TBD
MIN
DDR333
MAX
TBD
Notes
e,m
Units
V/ns
Rev. 0.1 June 2005
Notes
a, m
DDR SDRAM