M393T2950CZ3-CD5 SAMSUNG [Samsung semiconductor], M393T2950CZ3-CD5 Datasheet - Page 15

• Manufacturer Part Number: M393T2950CZ3-CD5
• Description: DDR2 Registered SDRAM MODULE 240pin Registered Module based on 512Mb C-die 72-bit ECC
• Manufacturer: SAMSUNG [Samsung semiconductor]

Electrical Characteristics & AC Timing for DDR2-800/667/533/400
Refresh Parameters by Device Density
Speed Bins and CL, tRCD, tRP, tRC and tRAS for Corresponding Bin
Timing Parameters by Speed Grade
(Refer to notes for informations related to this table at the bottom)
512MB, 1GB, 2GB Registered DIMMs
Refresh to active/Refresh command time
Average periodic refresh interval
DQ output access time from CK/CK
DQS output access time from CK/CK
CK high-level width
CK low-level width
CK half period
Clock cycle time, CL=x
DQ and DM input hold time
DQ and DM input setup time
Control & Address input pulse width for
each input
DQ and DM input pulse width for each input tDIPW
Data-out high-impedance time from CK/CK tHZ
DQS low-impedance time from CK/CK
DQ low-impedance time from CK/CK
DQS-DQ skew for DQS and associated DQ
signals
DQ hold skew factor
DQ/DQS output hold time from DQS
First DQS latching transition to associated
clock edge
Bin
(CL - tRCD - tRP)
Parameter
tCK, CL=3
tCK, CL=4
tCK, CL=5
(0 °C < T
Speed
tRCD
tRAS
tRP
tRC
Parameter
Parameter
OPER
< 95 °C; V
3.75
12.5
12.5
51.5
min
2.5
39
DDR2-800(E7)
5
DDQ
5 - 5 - 5
tAC
tDQSCK
tCH
tCL
tHP
tCK
tDH(base)
tDS(base)
tIPW
tLZ(DQS)
tLZ(DQ)
tDQSQ
tQHS
tQH
tDQSS
Symbol
= 1.8V + 0.1V; V
70000
tRFC
tREFI
max
8
8
8
-
-
-
min(tCL,t
tAC min
2* tAC
- 0.25
tQHS
2500
tHP -
min
- 400
- 350
0.45
0.45
CH)
125
0.35
min
50
0.6
DDR2-800
x
x
x
3.75
85 °C < T
min
0 °C ≤ T
15
15
54
39
DD
Symbol
DDR2-667(E6)
5
3
tAC max
tAC max
tAC max
max
8000
0.55
0.55
0.25
200
300
400
350
= 1.8V + 0.1V)
5 - 5 - 5
x
x
x
x
x
x
CASE
CASE
min(tCL,
tAC min
70000
2*tAC
tQHS
max
tHP -
-0.25
3000
min
-400
0.45
0.45
tCH)
-450
175
100
0.35
min
≤ 85°C
0.6
≤ 95°C
8
8
8
-
-
-
x
DDR2-667
x
x
tAC max
tAC max
tAC max 2* tACmin tAC max 2* tACmin
max
+400
8000
0.55
0.55
0.25
+450
240
340
x
x
x
x
x
x
3.75
3.75
min
256Mb
15
15
55
40
DDR2-533(D5)
5
7.8
3.9
75
4 - 4 - 4
min(tCL,
tAC min
tQHS
3750
tHP -
-0.25
min
tCH)
0.45
0.45
-500
-450
225
100
0.35
0.6
x
DDR2-533
x
x
70000
512Mb
max
105
7.8
3.9
8
8
8
-
-
-
tAC max
tAC max
max
+500
+450
8000
0.55
0.55
0.25
300
400
x
x
x
x
x
x
127.5
min(tCL,
1Gb
tAC min
7.8
3.9
tQHS
tHP -
-0.25
min
5000
min
-600
-500
0.45
0.45
tCH)
0.35
275
150
0.6
15
15
55
40
DDR2-400(CC)
5
5
x
-
DDR2-400
x
x
Rev. 1.2 Aug. 2005
3 - 3 - 3
DDR2 SDRAM
tAC max
tAC max
2Gb
tAC max
195
7.8
3.9
max
+600
+500
0.55
0.55
8000
0.25
350
450
x
x
x
x
x
x
70000
max
8
8
-
-
-
-
327.5
4Gb
Units
7.8
3.9
tCK
tCK
tCK
tCK
tCK
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
Units
ns
ns
ns
ns
ns
ns
ns
Notes
Units
ns
µs
µs