M393T6450FG0-CC SAMSUNG [Samsung semiconductor], M393T6450FG0-CC Datasheet - Page 13

• Manufacturer Part Number: M393T6450FG0-CC
• Description: DDR2 Registered SDRAM MODULE 240pin Registered Module based on 256Mb F-die 72-bit ECC
• Manufacturer: SAMSUNG [Samsung semiconductor]

Electrical Characteristics & AC Timing for DDR2-667/533/400 SDRAM
Refresh Parameters by Device Density
Speed Bins and CL, tRCD, tRP, tRC and tRAS for Corresponding Bin
Timing Parameters by Speed Grade
(Refer to notes for informations related to this table at the bottom)
Refresh to active/Refresh command time
Average periodic refresh interval
DQ output access time from CK/CK
DQS output access time from CK/CK
CK high-level width
CK low-level width
CK half period
Clock cycle time, CL=x
DQ and DM input hold time
DQ and DM input setup time
Control & Address input pulse width for each
input
DQ and DM input pulse width for each input
Data-out high-impedance time from CK/CK
DQS low-impedance time from CK/CK
DQ low-impedance time from CK/CK
DQS-DQ skew for DQS and associated DQ
signals
DQ hold skew factor
DQ/DQS output hold time from DQS
Write command to first DQS latching transition
DQS input high pulse width
256MB, 512MB Registered DIMMs
Bin (CL - tRCD - tRP)
(0 °C < T
Parameter
tCK, CL=3
tCK, CL=4
tCK, CL=5
Speed
tRCD
tRAS
Parameter
tRC
tRP
Parameter
CASE
< 95 °C; V
DDQ
3.75
min
= 1.8V + 0.1V; V
15
15
54
39
tAC
tDQSCK
tCH
tCL
tHP
tCK
tDH
tDS
tIPW
tDIPW
tHZ
tLZ(DQS)
tLZ(DQ)
tDQSQ
tQHS
tQH
tDQSS
tDQSH
5
3
Symbol
DDR2-667(E6)
5 - 5 - 5
tRFC
tREFI
min(tCL, tCH)
tHP - tQHS
2*tAC min
WL-0.25
70000
tAC min
max
3000
min
-400
0.45
0.45
0.35
-450
175
0.35
0.6
50
8
8
8
x
x
x
DD
DDR2-667
85 °C < T
0 °C ≤ T
= 1.8V + 0.1V)
Symbol
WL+0.25
tAC max
tAC max
tAC max
max
CASE
+400
8000
0.55
0.55
+450
CASE
250
350
x
x
x
x
x
x
x
3.75
min
15
15
55
40
5
-
≤ 85°C
≤ 95°C
DDR2-533(D5)
4 - 4 - 4
min(tCL, tCH)
tHP - tQHS
2* tACmin
WL-0.25
tAC min
3750
min
0.45
0.45
0.35
-500
-450
225
100
0.35
0.6
x
x
x
DDR2-533
256Mb
70000
max
7.8
3.9
75
8
8
-
tAC max
WL+0.25
tAC max
tAC max
max
+500
+450
8000
0.55
0.55
300
400
x
x
x
x
x
x
x
512Mb
105
7.8
3.9
min(tCL, tCH)
min
15
15
55
40
tHP - tQHS
5
5
2* tACmin
-
WL-0.25
tAC min
DDR2-400(CC)
5000
min
-600
-500
0.45
0.45
0.35
0.35
275
150
0.6
x
x
x
127.5
1Gb
3 - 3 - 3
7.8
3.9
DDR2-400
Rev. 1.3 Aug. 2005
DDR2 SDRAM
WL+0.25
70000
tAC max
tAC max
tAC max
max
2Gb
195
7.8
3.9
max
+600
+500
0.55
0.55
8000
350
450
8
8
-
x
x
x
x
x
x
x
4Gb
tbd
7.8
3.9
Units Notes
tCK
tCK
tCK
tCK
tCK
tCK
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
Units
ns
ns
ns
ns
ns
ns
ns
Units
ns
µs
µs