M391T2953BG0-CC SAMSUNG [Samsung semiconductor], M391T2953BG0-CC Datasheet - Page 19

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M391T2953BG0-CC

Manufacturer Part Number
M391T2953BG0-CC
Description
DDR2 Unbuffered SDRAM MODULE
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet
256MB,512MB,1GB Unbuffered DIMMs
Write recovery time
Auto precharge write
recovery + precharge time
Internal write to read
command delay
Internal read to precharge
command delay
Exit self refresh to a non-
read command
Exit self refresh to a read
command
Exit precharge power down
to any non-read command
Exit active power down to
read command
Exit active power down to
read command
(Slow exit, Lower power)
CKE minimum pulse width
(high and low pulse width)
ODT turn-on delay
ODT turn-on
ODT turn-on(Power-Down
mode)
ODT turn-off delay
ODT turn-off
ODT turn-off (Power-Down
mode)
ODT to power down entry
latency
ODT power down exit
latency
OCD drive mode output
delay
Minimum time clocks
remains ON after CKE
asynchronously drops LOW
Parameter
Symbol
tWR
tDAL
tWTR
tRTP
tXSNR
tXSRD
tXP
tXARD
tXARDS
t
t
t
t
t
t
t
tANPD
tAXPD
tOIT
tDelay
CKE
AOND
AON
AONPD
AOFD
AOF
AOFPD
tRFC + 10
tAC(min)+
tAC(min)+
tWR+tRP
tAC(min)
tAC(min)
tIS+tCK
6 - AL
min
+tIH
200
7.5
7.5
2.5
15
3
2
2
2
2
3
8
0
2
DDR2-533
2tCK+tAC
tAC(max)
tAC(max)+
tAC(max)
(max)+1
2.5tCK+
max
2.5
+1
0.6
+1
12
x
x
2
x
x
x
tRFC + 10
tAC(min)+
tAC(min)+
tWR+tRP
tAC(min)
tAC(min)
tIS+tCK
6 - AL
min
+tIH
200
7.5
2.5
15
10
2
3
2
2
2
3
8
0
2
DDR2-400
tAC(max)+
tAC(max)+
2tCK+tAC
tAC(max)+
(max)+1
2.5tCK+
max
2.5
0.6
12
x
2
1
1
x
x
x
x
Units
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
Rev. 1.2 Jan. 2005
DDR2 SDRAM

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