M391T3253FG0-CC SAMSUNG [Samsung semiconductor], M391T3253FG0-CC Datasheet - Page 16

• Manufacturer Part Number: M391T3253FG0-CC
• Description: DDR2 Unbuffered SDRAM MODULE
• Manufacturer: SAMSUNG [Samsung semiconductor]

Electrical Characteristics & AC Timing for DDR2-667/533/400 SDRAM
Refresh Parameters by Device Density
Speed Bins and CL, tRCD, tRP, tRC and tRAS for Corresponding Bin
Timing Parameters by Speed Grade
(Refer to notes for informations related to this table at the bottom)
Refresh to active/Refresh command time
Average periodic refresh interval
Bin (CL - tRCD - tRP)
Parameter
tCK, CL=3
tCK, CL=4
tCK, CL=5
tRCD
tRP
tRC
tRAS
DQ output access time from CK/CK
DQS output access time from CK/CK
CK high-level width
CK low-level width
CK half period
Clock cycle time, CL=x
DQ and DM input hold time
DQ and DM input setup time
Control & Address input pulse width for each input
DQ and DM input pulse width for each input
Data-out high-impedance time from CK/CK
DQS low-impedance time from CK/CK
DQ low-impedance time from CK/CK
DQS-DQ skew for DQS and associated DQ signals
DQ hold skew factor
DQ/DQS output hold time from DQS
Write command to first DQS latching transition
DQS input high pulse width
256MB, 512MB Unbuffered DIMMs
(0 °C < T
Speed
Parameter
CASE
Parameter
< 95 °C; V
DDQ
3.75
min
= 1.8V + 0.1V; V
15
15
54
39
5
3
DDR2-667(E6)
5 - 5- 5
tRFC
tREFI
tAC
tDQSCK
tCH
tCL
tHP
tCK
tDH
tDS
tIPW
tDIPW
tHZ
tLZ(DQS)
tLZ(DQ)
tDQSQ
tQHS
tQH
tDQSS
tDQSH
Symbol
70000
max
8
8
8
DD
85 °C < T
0 °C ≤ T
tHP - tQHS
= 1.8V + 0.1V)
Symbol
2*tAC min
min(tCL,
WL-0.25
tAC min
3000
-450
-400
0.45
0.45
tCH)
0.35
min
175
0.35
0.6
50
x
x
x
DDR2-667
CASE
CASE
3.75
min
15
15
55
40
WL+0.25
5
tAC max
tAC max
tAC max
-
≤ 85°C
≤ 95°C
DDR2-533(D5)
+450
+400
8000
max
0.55
0.55
250
350
x
x
x
x
x
x
x
4 - 4 - 4
tHP - tQHS
2* tACmin
min(tCL,
WL-0.25
tAC min
3750
tCH)
0.45
0.45
0.35
min
-500
-450
225
100
0.35
0.6
256Mb
x
x
x
70000
max
DDR2-533
7.8
3.9
75
8
8
-
tAC max
WL+0.25
tAC max
tAC max
+500
+450
8000
max
0.55
0.55
300
400
x
x
x
x
x
x
x
512Mb
105
7.8
3.9
tHP - tQHS
min
2* tACmin
15
15
55
40
min(tCL,
WL-0.25
tAC min
5
5
-
5000
-600
-500
0.45
0.45
tCH)
0.35
0.35
DDR2-400(CC)
min
275
150
0.6
x
x
x
DDR2-400
127.5
1Gb
3 - 3 - 3
7.8
3.9
Rev. 1.3 Aug. 2005
WL+0.25
tAC max
DDR2 SDRAM
tAC max
tAC max
+600
+500
max
0.55
0.55
8000
350
450
x
x
x
x
x
x
x
70000
max
2Gb
195
7.8
3.9
8
8
-
Units
tCK
tCK
tCK
tCK
tCK
tCK
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
4Gb
tbd
7.8
3.9
Units
15,16,17
15,16,17
ns
ns
ns
ns
ns
ns
ns
Notes
20,21
Units
24
27
27
22
21
ns
µs
µs