GS864418 GSI [GSI Technology], GS864418 Datasheet - Page 29

• Manufacturer Part Number: GS864418
• Description: 4M x 18, 2M x 36, 1M x 72 72Mb S/DCD Sync Burst SRAMs
• Manufacturer: GSI [GSI Technology]

TMS
TCK
TDI
·
Identification (ID) Register
The ID Register is a 32-bit register that is loaded with a device and vendor specific 32-bit code when the controller is put in
Capture-DR state with the IDCODE command loaded in the Instruction Register. The code is loaded from a 32-bit on-chip ROM.
It describes various attributes of the RAM as indicated below. The register is then placed between the TDI and TDO pins when the
controller is moved into Shift-DR state. Bit 0 in the register is the LSB and the first to reach TDO when shifting begins.
ID Register Contents (per die)
Rev: 1.03 11/2004
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
·
Bit #
x72
x36
x32
x18
x16
·
·
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
·
X
X
X
X
X
Revision
X
X
X
X
X
Code
Die
·
X
X
X
X
X
Test Access Port (TAP) Controller
Bypass Register
Instruction Register
ID Code Register
2
31 30 29
0
Boundary Scan Register
·
1
X
X
X
X
X
0
Control Signals
·
0
0
0
0
0
·
· · ·
0
0
0
0
0
·
0
0
0
0
0
2
1
0
0
0
0
0
0
·
JTAG TAP Block Diagram (2-die module)
0
0
0
0
0
Not Used
·
0
0
0
0
0
0
0
0
0
0
·
0
0
0
0
0
29/41
·
TDO
0
0
0
0
0
0
0
0
0
0
TDI
0
0
0
0
0
·
·
GS864418(B/E)/GS864436(B/E)/GS864472(C)
0
0
0
0
0
·
1
1
1
1
1
Configuration
·
0
0
1
0
1
I/O
Test Access Port (TAP) Controller
Bypass Register
Instruction Register
ID Code Register
0
0
0
1
1
31 30 29
2
0
Boundary Scan Register
·
1
0
1
0
0
0
0
Control Signals
·
·
0
0
0
0
0
· · ·
0 0 1 1 0 1 1 0 0 1
0 0 1 1 0 1 1 0 0 1
0 0 1 1 0 1 1 0 0 1
0 0 1 1 0 1 1 0 0 1
0 0 1 1 0 1 1 0 0 1
·
GSI Technology
2
JEDEC Vendor
1
0
ID Code
·
Product Preview
© 2003, GSI Technology
·
·
·
0
1
1
1
1
1
TDO