GS864418 GSI [GSI Technology], GS864418 Datasheet - Page 33
![no-image](/images/no-image-200.jpg)
GS864418
Manufacturer Part Number
GS864418
Description
4M x 18, 2M x 36, 1M x 72 72Mb S/DCD Sync Burst SRAMs
Manufacturer
GSI [GSI Technology]
Datasheet
1.GS864418.pdf
(41 pages)
- Current page: 33 of 41
- Download datasheet (861Kb)
JTAG Port Recommended Operating Conditions and DC Characteristics
Rev: 1.03 11/2004
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Notes:
1.
2.
3.
4.
5.
6.
7.
8.
9.
Input Under/overshoot voltage must be –2 V > Vi < V
V
0 V ≤ V
Output Disable, V
The TDO output driver is served by the V
I
I
I
I
Parallel SRAM input
OHJ
OLJ
OHJC
OHJC
ILJ
= + 4 mA
= –4 mA
≤ V
= –100 uA
= +100 uA
IN
IN
TMS, TCK and TDI Input Leakage Current
TMS, TCK and TDI Input Leakage Current
≤ V
≤ V
3.3 V Test Port Input High Voltage
2.5 V Test Port Input High Voltage
3.3 V Test Port Input Low Voltage
2.5 V Test Port Input Low Voltage
TMS
TDO
TCK
TDO Output Leakage Current
Test Port Output High Voltage
ILJn
DDn
TDI
Test Port Output Low Voltage
Test Port Output CMOS High
Test Port Output CMOS Low
OUT
= 0 to V
Parameter
DDn
tTKC
tTKC
DDQ
tTKQ
supply.
JTAG Port Timing Diagram
tTS
tTS
tTS
DDn
33/41
+2 V not to exceed 4.6 V maximum, with a pulse width not to exceed 20% tTKC.
tTH
tTH
tTH
tTKH
tTKH
Symbol
V
V
V
V
V
V
V
I
V
I
I
INHJ
OHJC
INLJ
OLJC
OLJ
GS864418(B/E)/GS864436(B/E)/GS864472(C)
IHJ3
IHJ2
ILJ3
ILJ2
OHJ
OLJ
V
tTKL
tTKL
DDQ
0.6 * V
Min.
–300
–0.3
–0.3
– 100 mV
2.0
1.7
–1
–1
—
—
DD2
0.3 * V
V
V
100 mV
DD3
DD2
Max.
100
0.8
0.4
—
—
1
1
+0.3
+0.3
DD2
Product Preview
© 2003, GSI Technology
Unit Notes
uA
uA
uA
V
V
V
V
V
V
V
V
5, 6
5, 7
5, 8
5, 9
1
1
1
1
2
3
4
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