GS881Z18AT GSI [GSI Technology], GS881Z18AT Datasheet - Page 27

• Manufacturer Part Number: GS881Z18AT
• Description: 9Mb Pipelined and Flow Through Synchronous NBT SRAM
• Manufacturer: GSI [GSI Technology]

JTAG Port Recommended Operating Conditions and DC Characteristics
Rev: 1.03 11/2004
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Notes:
1.
2.
3.
4.
5.
6.
7.
8.
9.
Input Under/overshoot voltage must be –2 V > Vi < V
V
0 V ≤ V
Output Disable, V
The TDO output driver is served by the V
I
I
I
I
Parallel SRAM input
OHJ
OLJ
OHJC
OHJC
ILJ
= + 4 mA
= –4 mA
≤ V
= –100 uA
= +100 uA
IN
IN
TMS, TCK and TDI Input Leakage Current
TMS, TCK and TDI Input Leakage Current
≤ V
≤ V
3.3 V Test Port Input High Voltage
2.5 V Test Port Input High Voltage
3.3 V Test Port Input Low Voltage
2.5 V Test Port Input Low Voltage
TMS
TDO
TCK
TDO Output Leakage Current
Test Port Output High Voltage
ILJn
DDn
TDI
Test Port Output Low Voltage
Test Port Output CMOS High
Test Port Output CMOS Low
OUT
= 0 to V
Parameter
DDn
tTKC
tTKC
DDQ
tTKQ
supply.
JTAG Port Timing Diagram
tTS
tTS
tTS
DDn
27/31
+2 V not to exceed 4.6 V maximum, with a pulse width not to exceed 20% tTKC.
tTH
tTH
tTH
tTKH
tTKH
Symbol
V
V
V
V
V
I
V
V
I
V
I
INHJ
OHJC
INLJ
OLJC
OLJ
IHJ3
ILJ3
OHJ
OLJ
IHJ
ILJ
GS881Z18/36AT-250/225/200/166/150/133
V
tTKL
tTKL
DDQ
0.6 * V
Min.
–300
–0.3
–0.3
– 100 mV
2.0
1.7
–1
–1
—
—
DD
V
V
0.3 * V
100 mV
DD3
DD2
Max.
100
0.8
0.4
—
—
1
1
+0.3
+0.3
DD
© 2001, GSI Technology
Unit Notes
uA
uA
uA
V
V
V
V
V
V
V
V
5, 6
5, 7
5, 8
5, 9
1
1
1
1
2
3
4