GS881Z18T GSI [GSI Technology], GS881Z18T Datasheet - Page 28

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GS881Z18T

Manufacturer Part Number
GS881Z18T
Description
8Mb Pipelined and Flow Through Synchronous NBT SRAMs
Manufacturer
GSI [GSI Technology]
Datasheet
JTAG Port Recommended Operating Conditions and DC Characteristics
JTAG Port AC Test Conditions
Notes:
1.
Rev: 1.10 8/2000
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com
Notes:
1.
2.
3.
4.
5.
6.
7.
8.
Include scope and jig capacitance.
This device features input buffers compatible with both 3.3 V and 2.5 V I/O drivers.
Input Under/overshoot voltage must be –2 V > Vi < V
tTKC.
V
0 V V
Output Disable, V
The TDO output driver is served by the V
I
I
OH
OL
DD
TMS, TCK and TDI Input Leakage Current
TMS, TCK and TDI Input Leakage Current
Output reference level
= +4 mA
= –4 mA
Input reference level
Input high level
Input slew rate
V
Input low level
Parameter
TDO Output Leakage Current
Test Port Output High Voltage
Test Port Output Low Voltage
Test Port Input High Voltage
IN
IN
Test Port Input Low Voltage
V
V
IL
IL
Parameter
OUT
= 0 to V
DD
DD
Conditions
supply.
1.25 V
1.25 V
1 V/ns
0.2 V
2.3 V
Symbol Min.
DD
V
I
V
V
I
V
I
INTH
+2 V with a pulse width not to exceed 20%
INTL
28/34
OLT
OHT
OLT
IHT
ILT
–300
–0.3
1.7
2.4
–1
–1
V
DD
Max.
0.8
0.4
1
1
1
+0.3
DQ
Unit Notes
uA
uA
uA
V
V
V
V
* Distributed Test Jig Capacitance
JTAG Port AC Test Load
1, 2
1, 2
6, 7
6, 8
3
4
5
GS881Z18/36T-11/100/80/66
© 1998, Giga Semiconductor, Inc.
V
T
= 1.25 V
50
Preliminary
30pF
*
.

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