PPC405EP-3GB133CZ AMCC [Applied Micro Circuits Corporation], PPC405EP-3GB133CZ Datasheet - Page 45

• Manufacturer Part Number: PPC405EP-3GB133CZ
• Description: PowerPC 405EP Embedded Processor
• Manufacturer: AMCC [Applied Micro Circuits Corporation]

PPC405EP – PowerPC 405EP Embedded Processor
Table 14. I/O Specifications—Group 1 (Sheet 1 of 2)
Notes:
1. PCI timings are for asynchronous operation up to 66.66MHz. PCI output hold time requirement is 1ns for 66.66MHz and 2ns
2. Ethernet interface meets timing requirements as defined by IEEE 802.3 standard. Timing shown is with EMAC noise filter
3. For PCI, I
AMCC
PCI Interface
PCIAD31:00
PCIC3:0/BE3:0
PCIClk
PCIDevSel
PCIFrame
PCIGnt0/Req
PCIGnt1:2
PCIIDSel
PCIINT[PerWE]
PCIIRDY
PCIParity
PCIPErr
PCIReq0/Gnt
PCIReq1:2
PCIReset
PCISErr
PCIStop
PCITRDY
Ethernet Interface
EMC0MDClk
EMC0MDIO
EMC0Tx0:1D3:0
EMC0Tx0:1En
EMC0Tx0:1Err
PHY0Col0:1
PHY0CrS0:1
PHY0Rx0:1Clk
PHY0Rx0:1D3:0
PHY0Rx0:1DV
PHY0Rx0:1Err
PHY0Tx0:1Clk
for 33.33MHz.
selected. See the CPC0_EPCTL register PowerPC 405EP Embedded Processor User’s Manual.
is specified at 0.4V.
Signal
OH
is specified at 0.9OV
Setup Time
(T
IS
100
na
na
na
na
na
na
na
na
na
na
na
3
3
3
3
3
3
3
3
5
3
3
2
2
2
2
2
min)
Input (ns)
DD
Hold Time
(T
and I
IH
na
na
na
na
na
na
na
na
na
na
na
0
0
0
0
0
0
0
0
0
0
0
0
3
3
4
4
4
min)
OL
is specified at 0.1OV
period + 10ns
1 OPB clock
Valid Delay
(T
settable
OV
na
na
na
na
na
na
14
14
14
na
na
na
na
na
na
na
6
6
6
6
6
6
6
6
6
6
max)
Output (ns)
1 OPB clock
Hold Time
(T
period
OH
DD
na
na
na
na
na
na
na
na
na
na
na
na
na
1
1
1
1
1
1
1
1
1
1
2
5
5
5
min)
. For all other interfaces, I
Output Current (mA)
(min)
10.3
10.3
10.3
10.3
10.3
I
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
na
na
na
na
na
na
na
na
na
na
OH
Revision 1.07 – September 10, 2007
(min)
I
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
7.1
7.1
7.1
7.1
7.1
na
na
OH
na
na
na
na
na
na
na
na
OL
is specified at 2.4V and I
EMC0MDClk
PHY0TxClk
PHY0TxClk
PHY0TxClk
PHY0RxClk
PHY0RxClk
PHY0RxClk
PHY0RxClk
PHY0RxClk
Data Sheet
PCIClk
PCIClk
PCIClk
PCIClk
PCIClk
PCIClk
PCIClk
PCIClk
PCIClk
PCIClk
PCIClk
PCIClk
PCIClk
PCIClk
PCIClk
Clock
async
async
async
async
Notes
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
OL
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