ISL6540CRZ INTERSIL [Intersil Corporation], ISL6540CRZ Datasheet - Page 12

• Manufacturer Part Number: ISL6540CRZ
• Description: Single-Phase Buck PWM Controller with Integrated High Speed MOSFET Driver and Pre-Biased Load Capability
• Manufacturer: INTERSIL [Intersil Corporation]

reference that tracks with the margining circuitry to prevent
accidental tripping. UV and OV functionality is not enabled
until the end of soft-start.
An OV event is detected asynchronously and causes the
high side MOSFET to turn off, the low side MOSFET to turn
on (effectively a 0% duty cycle), and PGOOD to pull low.
The regulator stays in this state and overrides sourcing and
sinking OCP protections until the OV event is cleared.
An UV event is detected asynchronously and results in the
PGOOD pulling low.
Overcurrent Protection
The ISL6540 monitors both the high side MOSFET and low
side MOSFET for overcurrent events. Dual sensing allows the
ISL6540 to detect overcurrent faults at the very low and very
high duty cycles that can result from the ISL6540’s wide input
range. The OCP function is enabled with the drivers at startup
and detects the peak current during each sensing period. A
resistor and a capacitor between the LSOC pin and GND set
the low side source and sinking current limits. A 100
source develops a voltage across the resistor which is then
compared with the voltage developed across the low side
MOSFET at conduction mode. The measurement comparator
uses offset correcting circuitry to provide precise current
measurements with roughly ±2mV of offset error. An ~120ns
blanking period, implemented on the upper and lower MOSFET
current sensing circuitries, is used to reduce the current
sampling error due to the leading-edge switching noise. An
additional 120ns low pass filter is used to further reduce
measurement error due to noise. In sourcing current
applications, the LSOC voltage is inverted and compared with
the voltage across the MOSFET while on. When this voltage
exceeds the LSOC set voltage, a sourcing OCP fault is
triggered. A 1000pF or greater filter capacitor should be used in
parallel with R
impacting the accuracy of the OCP measurement.
The ISL6540’s sinking current limit is set to the same voltage
as its sourcing limit. In sinking applications, when the voltage
across the MOSFET is greater than the voltage developed
Simple Low Side OCP Equation
R
Detailed Low Side OCP Equations
R
∆I =
I
N
OC_SINK
LSOC
LSOC
L
=
V
------------------------------- -
Number of low side MOSFETs
IN
=
=
F
- V
S
=
I
-------------------------------------------------------------------------------------- -


------------------------------------------------------------------------------------- -
OC_SOURCE
I
L
OC_SOURCE
OUT
I
------------------------------------------------------- -
LSOC
LSOC
•
r
DS ON
V
--------------- -
•
V
to prevent on chip parasitics from
OUT
I
N
LSOC
IN
(
L
100µA
r •
•
+
),L
R
DS ON
I ∆
---- -
2
LSOC
•


N
(
12
r •
L
DS ON
)LowSide
–
I ∆
---- -
(
2
),L
µ
A current
ISL6540
across the resistor (R
triggered. To avoid non-synchronous operation at light load,
the peak to peak output inductor ripple current should not be
greater than twice of the sinking current limit.
The high side sourcing current limit is set by connecting the
HSOC pin with a resistor (R
drain of the high side MOSEFT. A 100
develops a voltage across the resistor which is then
compared with the voltage developed across the high side
MOSFET while on. When the voltage drop across the
MOSFET exceeds the voltage drop across the resistor, a
sourcing OCP event occurs. A 1000pF or greater filter
capacitor should be used in parallel with R
chip parasitics from impacting the accuracy of the OCP
measurement and to smooth the voltage across R
presence of switching noise on the input bus.
Sourcing OCP faults cause the regulator to disable (Ugate and
Lgate drives pulled low, PGOOD pulled low, soft-start capacitor
discharged) itself for a fixed period of time after which a normal
soft-start sequence is initiated. The period of time the regulator
waits before attempting a soft-start sequence is set by three
charge and discharge cycles of the soft-start capacitor.
Sinking OCP faults cause the low side MOSFET drive to be
disabled, effectively operating the ISL6540 in a non-
synchronous manner. The fault is maintained for three clock
cycles at which point it is cleared and normal operation is
restored. OVP fault implementation overrides sourcing and
sinking OCP events, immediately turning on the low side
MOSFET and turning off the high side MOSFET. The OC trip
point varies mainly due to the MOSFETs r
and system noise. To avoid overcurrent tripping in the
normal operating load range, find the R
resistor from the previous detailed equations with:
Simple High Side OCP Equation
R
Detailed High Side OCP Equation
R
N
1. Maximum r
2. Minimum I
3. Determine the overcurrent trip point greater than the
HSOC
HSOC
U
maximum output continuous current at maximum
inductor ripple current.
=
Number of high side MOSFETs
=
=
I
---------------------------------------------------------------------------------------- -


-------------------------------------------------------------------------------------- -
OC_SOURCE
I
OC_SOURCE
LSOC
DS(ON)
I
HSOC
and/or I
LSOC
100µA
at the highest junction temperature;
r •
+
DS ON
I ∆
---- -
2
•
) a sinking OCP event is
HSOC


(
N
HSOC
r •
U
DS ON
)HighSide
) and a capacitor to the
(
from specification table;
µ
),U
A current source
HSOC
HSOC
DS(ON)
and/or R
to prevent on
HSOC
variations
March 9, 2006
FN9214.0
LSOC
in the