9P936AGLF IDT [Integrated Device Technology], 9P936AGLF Datasheet - Page 7

• Manufacturer Part Number: 9P936AGLF
• Description: Low Skew Dual Bank DDR I/II Fan-out Buffer
• Manufacturer: IDT [Integrated Device Technology]

IDT
T
Max clock frequency
Application Frequency Range
Input clock duty cycle
CLK stabilization
T
Period jitter
Half-period jitter
Cycle to Cycle Jitter
Static Phase Offset
Output to Output Skew
Output Duty Cycle
Output clock slew rate
1. Switching characteristics guaranteed for operating frequency range
Timing Requirements VDDQ2.5/1.8 = 2.5V +/- 0.2V
Switching Characteristics (VDDQ2.5/1.8 = 2.5V +/- 0.2V ) (see note 1)
A
A
ICS9P936
Low Skew Dual Bank DDR I/II Fan-out Buffer
TM
= 0 - 70°C Supply Voltage AVDD2.5 = 2.5V+/-0.2V (unless otherwise stated)
= 0 - 70°C; Supply Voltage AVDD = 2.5V+/-0.2V, VDDQ2.5/1.8 = 2.5 V +/- 0.2V (unless otherwise stated)
/ICS
PARAMETER
TM
PARAMETER
Low Skew Dual Bank DDR I/II Fan-out Buffer
SYMBOL
T
T
T
cyc
T
SYMBOL
(jit_hper)
T
t
t
jit (per)
(SPO)
freq
duty
sl(o)
skew
freq
T
-T
d
STAB
cyc
tin
App
op
Period jitter
Half period jitter
Cycle to Cycle jitter
DDR(0:5)
Measured from 20% to 80% of
VDDQ
CONDITIONS
CONDITION
7
MIN
45
95
40
SPECIFICATION
MAX
500
233
60
15
MIN
-60
-75
-60
-50
1.5
47
UNITS
SPECIFICATION
MHz
MHz
µs
%
TYP
0
MAX UNITS
60
75
60
50
40
53
4
1084C 12/03/09
V/ns
ps
ps
ps
ps
ps
ps