9P936AGLF IDT [Integrated Device Technology], 9P936AGLF Datasheet - Page 8

• Manufacturer Part Number: 9P936AGLF
• Description: Low Skew Dual Bank DDR I/II Fan-out Buffer
• Manufacturer: IDT [Integrated Device Technology]

IDT
ICS9P936
Low Skew Dual Bank DDR I/II Fan-out Buffer
How to Write:
• Controller (host) sends a start bit.
• Controller (host) sends the write address D4
• ICS clock will acknowledge
• Controller (host) sends a dummy command code
• ICS clock will acknowledge
• Controller (host) sends a dummy byte count
• ICS clock will acknowledge
• Controller (host) starts sending first byte (Byte 0)
• ICS clock will acknowledge each byte one at a
time .
• Controller (host) sends a Stop bit
Notes:
1.
2.
3.
4.
5.
6.
TM
/ICS
through byte 6
TM
The ICS clock generator is a slave/receiver, I
Read-Back will support Intel PIIX4 "Block-Read" protocol.
The data transfer rate supported by this clock generator is 100K bits/sec or less (standard mode)
The input is operating at 3.3V logic levels.
The data byte format is 8 bit bytes.
To simplify the clock generator I
must be accessed in sequential order from lowest to highest byte with the ability to stop after any complete byte has been
transferred. The Command code and Byte count shown above must be sent, but the data is ignored for those two bytes.
The data is loaded until a Stop sequence is issued.
At power-on, all registers are set to a default condition, as shown.
Low Skew Dual Bank DDR I/II Fan-out Buffer
Dummy Command Code
Dummy Byte Count
Controller (Host)
Start Bit
Address
Stop Bit
Byte 0
Byte 1
Byte 2
Byte 3
Byte 4
Byte 5
Byte 6
Byte 7
D4
(H)
How to Write:
For more information, contact ICS for an I
The information in this section assumes familiarity with I
General I
ICS (Slave/Receiver)
2
ACK
ACK
ACK
ACK
ACK
ACK
ACK
ACK
ACK
ACK
ACK
C interface, the protocol is set to use only "Block-Writes" from the controller. The bytes
2
C serial interface information
(H)
2
C component. It can read back the data stored in the latches for verification.
8
2
C programming application note.
How to Read:
• Controller (host) will send start bit.
• Controller (host) sends the read address D5
• ICS clock will acknowledge
• ICS clock will send the byte count
• Controller (host) acknowledges
• ICS clock sends first byte (Byte 0) through byte
• Controller (host) will need to acknowledge each
• Controller (host) will send a stop bit
7
byte
Controller (Host)
2
Address
Start Bit
C programming.
Stop Bit
D5
ACK
ACK
ACK
ACK
ACK
ACK
ACK
ACK
(H)
How to Read:
ICS (Slave/Receiver)
Byte Count
Byte 0
Byte 1
Byte 2
Byte 3
Byte 4
Byte 5
Byte 6
Byte 7
ACK
1084C 12/03/09
(H)