W6691CD WINBOND [Winbond], W6691CD Datasheet - Page 13
W6691CD
Manufacturer Part Number
W6691CD
Description
ISDN S/T Interface Transceiver
Manufacturer
WINBOND [Winbond]
Datasheet
1.W6691CD.pdf
(106 pages)
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4. PIN DESCRIPTION
TABLE 4.1 W6691 PIN DESCRIPTIONS
Note: The suffix "#" indicates an active LOW signal. In Intel or Motorola bus mode, all unspecified pins must
be left unconnected.
Pin
Name
MBS
AD7-0
CS#
ALE
RD#
WR#
RST#
INT#
MBS
D7-D0
A7-A0
CS#
DS#
RW
RST#
INT#
Pin
Number
52
23, 24, 25, 26,
27, 28, 29, 30
11
10
9
22
3
64
52
23, 24, 25, 26,
27, 28, 29, 30
12, 13, 14, 15,
16, 17, 18, 19
11
20
9
3
64
Motorola Bus Mode (Enabled when MBS=LOW)
Intel Bus Mode (Enabled when MBS=HIGH)
Type
I/O
I/O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
Functions
Microprocessor bus selector (MBS). This pin must be pulled to
HIGH.
Multiplexed address and data bus. During the address phase,
AD7-0 contains 8-bit physical address. During the data phase,
AD7-AD0 contains data.
Chip select.
Address Latch Enable. Used to latch addresses.
Read.
Write.
Reset.
Interrupt. The interrupt trigger level can be programmable by
ACTL2:INTOL. It provides two types of
including low level and high level.
Microprocessor bus selector (MBS). This pin must be pulled to
LOW.
Data bus.
Address bus.
Chip select.
Data strobe.
Read/Write identify. HIGH is for read and LOW is for write.
Reset.
Interrupt. The interrupt trigger level can be programmable by
ACTL2:INTOL. It provides two types of
including low level and high level.
13
Preliminary W6691
Publication Release Date: Sep 2001
interrupt trigger level
interrupt trigger level
Revision 1.1
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