EDD10163BBH-5BLS-F ELPIDA [Elpida Memory], EDD10163BBH-5BLS-F Datasheet - Page 11

• Manufacturer Part Number: EDD10163BBH-5BLS-F
• Manufacturer: ELPIDA [Elpida Memory]

Timing Parameter Measured in Clock Cycle
tCK
Parameter
Write to pre-charge command delay
(same bank)
Read to pre-charge command delay
(same bank)
Write to read command delay
(to input all data)
Burst stop command to write
command delay
(CL = 3)
Burst stop command to DQ high-Z
(CL = 3)
Read command to write command
delay (to output all data)
(CL = 3)
Pre-charge command to high-Z
(CL = 3)
Write command to data in latency
Write recovery
DM to data in latency
Mode register set command cycle
time
Self-refresh exit to non-column
command
Auto-refresh period
Power-down entry
Power-down exit to command input
CKE minimum pulse width
Preliminary Data Sheet E1436E30 (Ver. 3.0)
Symbol
tWPD
tRPD
tWRD
tBSTW
tBSTZ
tRWD
tHZP
tWCD
tWR
tDMD
tMRD
tSREX
tRFC
tPDEN
tPDEX
tCKE
Number of clock cycle
5.0ns
min.
4 + BL/2
BL/2
3 + BL/2
3
3
3 + BL/2
3
1
3
0
2
24
16
2
1
2
max.
11
6.0ns
min.
4 + BL/2
BL/2
2 + BL/2
3
3
3 + BL/2
3
1
3
0
2
20
13
2
1
2
max.
EDD10163BBH-LS
min.
3 + BL/2
BL/2
2 + BL/2
3
3
3 + BL/2
3
1
2
0
2
16
11
1
1
2
7.5ns
max.
Unit
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK