EMC6D100-DK SMSC [SMSC Corporation], EMC6D100-DK Datasheet - Page 39

• Manufacturer Part Number: EMC6D100-DK
• Description: ENVIRONMENTAL MONITORING AND CONTROL DEVICE WITH AUTOMATIC FAN CAPABILITY
• Manufacturer: SMSC [SMSC Corporation]

Environmental Monitoring and Control Device
Datasheet
SMSC EMC6D100/EMC6D101
Register
Address
6Dh
6Eh
7Ah
7Bh
7Ch
7Dh
7Eh
8Ah
8Bh
8Ch
8Dh
6Fh
70h
71h
72h
73h
74h
75h
76h
77h
78h
79h
7Fh
80h
81h
82h
83h
84h
85h
86h
87h
88h
89h
Read/
Write
R/W
R-C
R/W Zone 1, Zone 2 Hysteresis
R/W Zone 3, Hysteresis
R/W XOR Test Tree Enable
R/W +3.3V Low Limit
R/W +3.3V High Limit
R/W +1.5 Low Limit
R/W +1.5 High Limit
R/W +1.8 Low Limit
R/W +1.8 High Limit
R/W Test Mode Register
R/W Test Digital Value Register DVTR
R/W Interrupt Enable
R/W Configuration
R/W
R/W
R/W Reserved
R/W
R/W Reserved
R/W Reserved
R/W Output Test Reg 1
R/W Output Test Reg 2
Notes:
1.
2.
R
R
R
R
R
R
R
R
R
R
3
4
The Fan x Current Duty Cycle Registers are only writeable when the associated fan is in manual
mode. In this case, the register is writeable when the start bit is set, but not when the lock bit is set.
The Lock and Start bits in the Ready/Lock/Start register are locked by the Lock Bit. The OVRID bit is
always writeable, both when the start bit is set and when the lock bit is set.
+3.3V Reading
+1.5 Reading
+1.8 Reading
Error Debug Register
Special Function Register
Interrupt Status Register 3
Fan Temp Interrupt
Enable
Fan Tach/PWM Interrupt
Select
Sync Pulse Configuration
Register: ON/OFF
Smooth Remote Diode
Reading 1
Smooth Ambient Reading
Smooth Remote Diode
Reading 2
ADC 2 LSB Test
Input Test Reg 1
Input Test Reg 2
Register Name
MOTR
SAMR
XORT
ERDR
CONF
ADTR
CBO1
Abbr.
HYS3
SFTR
SRD1
SRD2
CBO2
HY12
V33R
V15R
V18R
V33H
V15H
FCF4
V33L
V15L
V18L
V18h
INT3
INTE
FTIE
FTIS
CBI1
CBI2
N/A
N/A
N/A
DATASHEET
(MSb) Bit 6
ANTST2
Bit 7
H1-3
H3-3
VCC
RES
RES
RES
RES
RES
RES
RES
RES
RES
RES
T4H
D2EN
RES
INIT
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
Page 39
ANTST1
H1-2
H3-2
AMB TEMP FAN4 FAN3 FAN2 FAN1
RES
RES
RES
RES
RES
RES
RES
RES
FTTST
12V
T4L
D1EN
ARA
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
ANTST0
Bit 5
H1-1
H3-1
RES
RES
RES
RES
RES
RES
RES
RES
T3H
STOP
AVG
5V
RES
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
OSCSEL
OFFCFG
INVADD
Bit 4
H1-0
SUREN
H3-0
RES
RES
RES
RES
RES
33V
T3L
ON
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
VCCP
ADCAVG
VOLTEN
Bit 3
H2-3
RES
RES
RES
RES
RES
RES
RES
T2H
TRDY
RCV
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
EXTCLK
Bit 2
H2-2
RES
RES
RES
RES
RES
RES
ROWR
INTEN
33V
25V
T2L
RES
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
MONMD
DIGTST
Bit 1
H2-1
RES
RES
INVRW
RES
RES
RES
RES
T1H
18V
18V
P4INT
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
(LSb)
ADCTST
NONAC
Bit 0
H2-0
RES
XEN
FAN
RES
RES
RES
RES
15V
15V
LPMD
T1L
RES
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Default
Value
ECh
4Dh
4Dh
FFh
FFh
FFh
E0h
5Eh
A4h
FFh
0Eh
0Eh
44h
40h
00h
00h
00h
00h
00h
00h
00h
00h
10h
62h
03h
80h
N/A
N/A
N/A
N/A
NA
NA
NA
Rev. 09-09-04
Lock Start
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
4
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
No
No
No
No
No
No
No
No
4