EDD2516AKTA-7A ELPIDA [Elpida Memory], EDD2516AKTA-7A Datasheet - Page 15
EDD2516AKTA-7A
Manufacturer Part Number
EDD2516AKTA-7A
Description
256M bits DDR SDRAM
Manufacturer
ELPIDA [Elpida Memory]
Datasheet
1.EDD2516AKTA-7A.pdf
(49 pages)
Function Truth Table
The following tables show the operations that are performed when each command is issued in each state of the
DDR SDRAM.
Current state
Precharging*
Idle*
Refresh
(auto-refresh)*
Activating*
Active*
Preliminary Data Sheet E0303E40 (Ver. 4.0)
2
5
4
1
3
/CS
H
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
H
L
L
L
L
H
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
/RAS /CAS /WE
×
H
H
H
H
L
L
L
×
H
H
H
H
L
L
L
L
×
H
H
H
L
×
H
H
H
H
L
L
L
×
H
H
H
H
L
L
L
×
H
H
L
L
H
H
L
×
H
H
L
L
H
H
L
L
×
H
H
L
×
×
H
H
L
L
H
H
L
×
H
H
L
L
H
H
L
×
H
L
H
L
H
L
×
×
H
L
H
L
H
L
H
L
×
H
L
×
×
×
H
L
H
L
H
L
×
×
H
L
H
L
H
L
×
Address
×
×
×
BA, CA, A10
BA, CA, A10
BA, RA
BA, A10
×
×
×
×
BA, CA, A10
BA, CA, A10
BA, RA
BA, A10
×
MODE
×
×
×
×
×
×
×
×
BA, CA, A10
BA, CA, A10
BA, RA
BA, A10
×
×
×
×
BA, CA, A10
BA, CA, A10
BA, RA
BA, A10
×
15
Command
DESL
NOP
BST
READ/READA
WRIT/WRITA
ACT
PRE, PALL
DESL
NOP
BST
READ/READA
WRIT/WRITA
ACT
PRE, PALL
REF, SELF
MRS
DESL
NOP
BST
DESL
NOP
BST
READ/READA
WRIT/WRITA
ACT
PRE, PALL
DESL
NOP
BST
READ/READA
WRIT/WRITA
ACT
PRE, PALL
Operation
NOP
NOP
ILLEGAL*
ILLEGAL*
ILLEGAL*
ILLEGAL*
NOP
ILLEGAL
NOP
NOP
ILLEGAL*
ILLEGAL*
ILLEGAL*
Activating
NOP
Refresh/
Self refresh*
Mode register set*
NOP
NOP
ILLEGAL
ILLEGAL
ILLEGAL
NOP
NOP
ILLEGAL*
ILLEGAL*
ILLEGAL*
ILLEGAL*
ILLEGAL*
ILLEGAL
NOP
NOP
ILLEGAL
Starting read operation Read/READA
Starting write operation
ILLEGAL*
Pre-charge
ILLEGAL
11
11
11
11
11
11
11
11
11
11
11
11
11
12
EDD2516AKTA
12
Next state
ldle
ldle
—
—
—
—
ldle
—
ldle
ldle
—
—
—
Active
ldle
ldle/
Self refresh
ldle
ldle
ldle
—
—
—
Active
Active
—
—
—
—
—
—
Active
Active
Active
Write
recovering/
precharging
—
Idle
—