KMM5322104CKU SAMSUNG [Samsung semiconductor], KMM5322104CKU Datasheet - Page 5

• Manufacturer Part Number: KMM5322104CKU
• Description: 2M x 32 DRAM SIMM using 2Mx8 , 2K Refresh, 5V
• Manufacturer: SAMSUNG [Samsung semiconductor]

DRAM MODULE
AC CHARACTERISTICS
Test condition : V
NOTES
Access time from CAS precharge
Hyper page mode cycle time
CAS precharge time from (Hyper Page Cycle)
RAS pulse width (Hyper Page Cycle)
RAS hold time from CAS precharge
W to RAS precharge time (C-B-R refresh)
W to RAS hold time (C-B-R refresh)
Output data hold time
Output buffer turn off delay from RAS
Output buffer turn off delay from W
W to data delay
W pulse width (Hyper Page Cycle)
6.
7.
1.
2.
3.
4.
5.
An initial pause of 200us is required after power-up followed
by any 8 RAS-only or CAS-before-RAS refresh cycles before
proper device operation is achieved.
V
timing of input signals. Transition times are measured
between V
for all inputs.
Measured with a load equivalent to 2 TTL loads and 100pF.
Operation within the
can be met.
If
access time is controlled exclusively by
Assumes that
This parameter defines the time at which the output achieves
the open circuit condition and is not referenced to V
V
t
the data sheet as electrical characteristics only. If
t
out pin will remain high impedance for the duration of the
cycle.
WCS
WCS
IH
OL
t
(min) and V
RCD
.
is non-restrictive operating parameter. It is included in
t
WCS
is greater than the specified
ih
IH
(min), the cycle is an early write cycle and the data
/V
Parameter
(min) and V
t
RCD
il
t
=2.4/0.8V, V
RCD
IL
(max) is specified as a reference point only.
(max) are reference levels for measuring
t
RCD
t
RCD
IL
(max).
(max) and are assumed to be 5ns
(max) limit insures that
oh
(0 C T
/V
ol
=2.0/0.8V, output loading CL=100pF
A
70 C, V
t
t
RCD
CAC
t
t
t
t
t
t
t
t
t
t
t
t
Symbol
(max) limit, then
CPA
HPC
CP
RASP
RHCP
WRP
WRH
DOH
REZ
WEZ
WED
WPE
.
CC
=5.0V 10%. See notes 1,2.)
t
RAC
(max)
OH
Min
or
25
50
30
10
10
15
8
5
3
3
5
10.
11.
12.
13.
8.
9.
-5
Either
These parameters are referenced to the CAS leading edge in
early write cycles and to the W leading edge in read-write
cycles.
Operation within the
can be met.
t
access time is controlled by
t
time at which the output achieves the open circuit condition
and are not referenced to output voltage level.
If RAS goes to high before CAS high going, the open circuit
condtion of the output is achieved by CAS high going. If CAS
goes to high before RAS high going, the open circuit condtion
of the output is achieved by RAS high going.
t
RAD
CEZ
ASC
200K
Max
(max),
30
13
13
t
is greater than the specified
CP min
t
RCH
t
or
REZ
t
RAD
KMM5322104CKU/CKUG
t
RRH
(max),
(max) is specified as reference point only. If
Min
30
10
60
35
10
10
15
5
3
3
5
must be satisfied for a read cycle.
t
RAD
t
WEZ
-6
(max) limit insures that
(max) and
t
AA
200K
Max
.
35
15
15
t
t
RAD
OEZ
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(max) limit, then
(max) define the
t
6,11,12
RAC
Note
6,11
13
3
(max)