8S89834AKILF IDT [Integrated Device Technology], 8S89834AKILF Datasheet

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8S89834AKILF

Manufacturer Part Number
8S89834AKILF
Description
Low Skew, 2-to-4 LVCMOS/LVTTL-to-LVPECL/ECL Clock Multiplexer
Manufacturer
IDT [Integrated Device Technology]
Datasheet
General Description
and 10 Gigabit Ethernet, and Fibre Channel. The device also has an
output enable pin which may be useful for system test and debug
purposes. The ICS8S89834I is packaged in a small 3mm x 3mm
16-pin VFQFN package which makes it ideal for use in
space-constrained applications.
ICS8S89834AKI REVISION A FEBRUARY 4, 2010
HiPerClockS™
ICS
SEL
Block Diagram
IN1
IN2
EN
Pullup
Pullup
Pullup
Pullup
The ICS8S89834I is a high speed 2-to-4
LVCMOS/LVTTL-to-LVPECL/ECL Clock Multiplexer.
The ICS8S89834I is optimized for high speed and very
low output skew, making it suitable for use in
demanding applications such as SONET, 1 Gigabit
1
0
Low Skew, 2-to-4 LVCMOS/LVTTL-to-
LVPECL/ECL Clock Multiplexer
D
CK
Q
Q0
nQ0
Q1
nQ1
Q2
nQ2
Q3
nQ3
1
Features
Four differential LVPECL/ECL output pairs
Two LVCMOS/LVTTL clock inputs
Maximum output frequency: 1GHz
Output skew: 30ps (maximum)
Part-to-part skew: 100ps (maximum)
Propagation delay: 550ps (maximum)
Additive phase jitter, RMS: 0.12ps (typical)
Full 3.3V and 2.5V operating supply modes
-40°C to 85°C ambient operating temperature
Available in lead-free (RoHS 6) package
3mm x 3mm x 0.925mm package body
Pin Assignment
nQ1
nQ2
Q1
Q2
16-Lead VFQFN
ICS8S89834I
1
2
3
4
K Package
16 15 14 13
Top View
5
6
©2010 Integrated Device Technology, Inc.
7
8
12
11
10
9
IN1
SEL
nc
IN2
ICS8S89834I
DATA SHEET

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8S89834AKILF Summary of contents

Page 1

Low Skew, 2-to-4 LVCMOS/LVTTL-to- LVPECL/ECL Clock Multiplexer General Description The ICS8S89834I is a high speed 2-to-4 ICS LVCMOS/LVTTL-to-LVPECL/ECL Clock Multiplexer. The ICS8S89834I is optimized for high speed and very HiPerClockS™ low output skew, making it suitable for use in demanding ...

Page 2

ICS8S89834I Data Sheet Table 1. Pin Descriptions Number Name 1, 2 Q1, nQ1 Output 3, 4 Q2, nQ2 Output 5, 6 Q3, nQ3 Output Power Input 9 IN2 Input 10 nc Unused 11 SEL ...

Page 3

ICS8S89834I Data Sheet Function Tables Table 3A. Control Input Function Table Inputs EN Selected Source 0 IN1, IN2 1 IN1, IN2 NOTE: EN switches, the clock outputs are disabled or enabled following a falling input clock edge as shown in ...

Page 4

ICS8S89834I Data Sheet Absolute Maximum Ratings NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those ...

Page 5

ICS8S89834I Data Sheet Table 4D. LVPECL DC Characteristics, V Symbol Parameter V Output High Voltage; NOTE Output Low Voltage; NOTE Output Voltage Swing OUT V Differential Output Voltage Swing DIFF_OUT Ω NOTE 1: Outputs ...

Page 6

ICS8S89834I Data Sheet Additive Phase Jitter The spectral purity in a band at a specific offset from the fundamental compared to the power of the fundamental is called the dBc Phase Noise. This value is normally expressed using a Phase ...

Page 7

ICS8S89834I Data Sheet Parameter Measurement Information LVPECL V EE -1.3V±0.33V 3.3V LVPECL Output Load AC Test Circuit Par t 1 nQx Qx Par t 2 nQy Qy tsk(pp) Part-to-Part Skew V DD IN1, IN2 ...

Page 8

ICS8S89834I Data Sheet Parameter Measurement Information, continued nQ0:nQ3 80% 20% Q0: Output Rise/Fall Time OUT 800mV (typical) Differential Output Voltage Swing Application Information Recommendations for Unused Input and Output Pins Inputs: IN Inputs For ...

Page 9

ICS8S89834I Data Sheet VFQFN EPAD Thermal Release Path In order to maximize both the removal of heat from the package and the electrical performance, a land pattern must be incorporated on the Printed Circuit Board (PCB) within the footprint of ...

Page 10

ICS8S89834I Data Sheet Termination for 3.3V LVPECL Outputs The clock layout topology shown below is a typical termination for LVPECL outputs. The two different layouts mentioned are recommended only as guidelines. The differential outputs are low impedance follower outputs that ...

Page 11

ICS8S89834I Data Sheet Termination for 2.5V LVPECL Outputs Figure 4A and Figure 4B show examples of termination for 2.5V LVPECL driver. These terminations are equivalent to terminating 50Ω – 2V. For V = 2.5V, the ...

Page 12

ICS8S89834I Data Sheet Power Considerations This section provides information on power dissipation and junction temperature for the ICS8S89834I. Equations and example calculations are also provided. 1. Power Dissipation. The total power dissipation for the ICS8S89834I is the sum of the ...

Page 13

ICS8S89834I Data Sheet 3. Calculations and Equations. The purpose of this section is to calculate the power dissipation for the LVPECL output pairs. LVPECL output driver circuit and termination are shown in Figure Figure 5. LVPECL ...

Page 14

ICS8S89834I Data Sheet Reliability Information Table 6. θ vs. Air Flow Table for a 16 Lead VFQFN JA Meters per Second Multi-Layer PCB, JEDEC Standard Test Boards Transistor Count The transistor count for ICS8S89834I is: 351 This device is pin ...

Page 15

ICS8S89834I Data Sheet Package Outline and Package Dimensions Package Outline - K Suffix for 16 Lead VFQFN Seating Plan Index rea N Top View D Chamfer 4x 0.6 x 0.6 max OPTIONAL Bottom View w/Type CHAMFER ...

Page 16

... Marking 8S89834AKILF 834A 8S89834AKILFT 834A NOTE: Parts that are ordered with an "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use ...

Page 17

ICS8S89834I Data Sheet 6024 Silver Creek Valley Road Sales 800-345-7015 (inside USA) San Jose, California 95138 +408-284-8200 (outside USA) Fax: 408-284-2775 www.IDT.com/go/contactIDT DISCLAIMER Integrated Device Technology, Inc. (IDT) and its subsidiaries reserve the right to modify the products and/or specifications ...

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