HCTS21HMSR INTERSIL [Intersil Corporation], HCTS21HMSR Datasheet

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HCTS21HMSR

Manufacturer Part Number
HCTS21HMSR
Description
Radiation Hardened Dual 4-Input AND Gate
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet
October 1995
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com
Features
• 3 Micron Radiation Hardened SOS CMOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm
• Single Event Upset (SEU) Immunity < 2 x 10
• Dose Rate Survivability: >1 x 10
• Dose Rate Upset >10
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• LSTTL Input Compatibility
• Input Current Levels Ii
Description
The Intersil HCTS21MS is a Radiation Hardened Dual Input AND
Gate. A high on all inputs forces the output to a High state.
The HCTS21MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of radia-
tion hardened, high-speed, CMOS/SOS Logic Family.
The HCTS21MS is supplied in a 14 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
Ordering Information
HCTS21DMSR
HCTS21KMSR
HCTS21D/
Sample
HCTS21K/
Sample
HCTS21HMSR
(Typ)
- VIL = 0.8V Max
- VIH = VCC/2 Min
NUMBER
PART
|
TEMPERATURE
-55
-55
Copyright
o
o
RANGE
C to +125
C to +125
+25
+25
+25
10
o
o
o
©
C
C
C
RAD(Si)/s 20ns Pulse
Intersil Corporation 1999
5 A at VOL, VOH
o
o
C
C
Intersil Class
S Equivalent
Intersil Class
S Equivalent
Sample
Sample
Die
SCREENING
12
o
LEVEL
C to +125
RAD (Si)/s
o
-9
C
14 Lead SBDIP
14 Lead Ceramic
Flatpack
14 Lead SBDIP
14 Lead Ceramic
Flatpack
Die
2
/mg
Errors/Bit-Day
PACKAGE
1
Pinouts
Functional Diagram
NOTE: L = Logic Level Low, H = Logic level High, X = Don’t Care
14 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE
(FLATPACK) MIL-STD-183S CDFP3-F14, LEAD FINISH C
HCTS21MS
GND
NC
A1
B1
C1
D1
Y1
An
Bn
Cn
Dn
An
H
L
X
X
X
MIL-STD-183S CDIP2-T14, LEAD FINISH C
14 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
Bn
H
X
X
X
GND
L
NC
INPUTS
A1
B1
C1
D1
Y1
1
2
3
4
5
6
7
Dual 4-Input AND Gate
TRUTH TABLE
1
2
3
4
5
6
7
Cn
X
X
X
H
L
TOP VIEW
TOP VIEW
Radiation Hardened
Dn
X
X
X
H
L
Spec Number
14
13
12
11
10
9
8
File Number
14
13
12
10
11
9
8
VCC
D2
C2
NC
B2
A2
Y2
OUTPUTS
Yn
H
L
L
L
L
518618
3053.1
VCC
D2
C2
NC
B2
A2
Y2
Yn

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HCTS21HMSR Summary of contents

Page 1

... HCTS21KMSR - +125 C Intersil Class S Equivalent o HCTS21D/ +25 C Sample Sample o HCTS21K/ +25 C Sample Sample o HCTS21HMSR +25 C Die CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. © | http://www.intersil.com Copyright Intersil Corporation 1999 HCTS21MS Pinouts 2 /mg -9 Errors/Bit-Day 12 RAD (Si)/ +125 ...

Page 2

Absolute Maximum Ratings Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V Input Voltage ...

Page 3

TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER SYMBOL Input to Output TPHL VCC = 4.5V TPLH VCC = 4.5V NOTES: 1. All voltages referenced to device GND measurements assume RL = 500 , CL = 50pF, Input TR ...

Page 4

TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25 PARAMETER ICC IOL/IOH CONFORMANCE GROUPS Initial Test (Preburn-In) Interim Test I (Postburn-In) Interim Test II (Postburn-In) PDA Interim Test III (Postburn-In) PDA Final Test Group A (Note 1) Group B ...

Page 5

TABLE 8. STATIC AND DYNAMIC BURN-IN TEST CONDITIONS OPEN GROUND STATIC BURN-IN I TEST CONDITIONS 10, 12, 13 STATIC BURN-IN II TEST CONNECTIONS DYNAMIC BURN-IN ...

Page 6

Intersil Space Level Product Flow - ‘MS’ Wafer Lot Acceptance (All Lots) Method 5007 (Includes SEM) GAMMA Radiation Verification (Each Wafer) Method 1019, 4 Samples/Wafer, 0 Rejects 100% Nondestructive Bond Pull, Method 2023 Sample - Wire Bond Pull Monitor, Method ...

Page 7

AC Timing Diagrams VIH INPUT VS VIL TPLH VOH VS OUTPUT VOL TTLH VOH 80% 20% OUTPUT VOL AC VOLTAGE LEVELS PARAMETER HCTS VCC 4.50 VIH 3.00 VS 1.30 VIL 0 GND 0 HCTS21MS AC Load Circuit TPHL TTHL 80% ...

Page 8

Die Characteristics DIE DIMENSIONS mils 2.20 x 2.24mm METALLIZATION: Type: SiAl Å Å Metal Thickness: 11k 1k GLASSIVATION: Type: SiO 2 Å Å Thickness: 13k 2.6k WORST CASE CURRENT DENSITY <2 A/cm BOND ...

Page 9

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, ...

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