HCTS75DMSR INTERSIL [Intersil Corporation], HCTS75DMSR Datasheet
HCTS75DMSR
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HCTS75DMSR Summary of contents
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... This device is a member of radia- tion hardened, high-speed, CMOS/SOS Logic Family. The HCTS75MS is supplied lead Ceramic flatpack (K suffi SBDIP Package (D suffix). Ordering Information PART TEMPERATURE SCREENING NUMBER RANGE o o HCTS75DMSR - +125 C Intersil Class S Equivalent o o HCTS75KMSR - +125 C ...
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Absolute Maximum Ratings Supply Voltage (VCC -0.5V to +7.0V Input Voltage Range, All Inputs . . ...
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TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER SYMBOL Propagation Delay TPLH VCC = 4.5V, VIH = 3.0V VIL = 0V TPHL VCC = 4.5V, VIH = 3.0V, VIL = 0V Propagation Delay TPLH VCC = 4.5V, VIH ...
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TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETERS SYMBOL Supply Current ICC VCC = 5.5V, VIN = VCC or GND Output Current IOL VCC = VIH = 4.5V, VOUT = 0.4V, VIL = 0V (Sink) Output Current IOH VCC ...
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CONFORMANCE GROUPS Initial Test (Preburn-In) Interim Test I (Postburn-In) Interim Test II (Postburn-In) PDA Interim Test III (Postburn-In) PDA Final Test Group A (Note 1) Group B Subgroup B-5 Subgroup B-6 Group D NOTES: 1. Alternate group A inspection in ...
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Intersil Space Level Product Flow - ‘MS’ Wafer Lot Acceptance (All Lots) Method 5007 (Includes SEM) GAMMA Radiation Verification (Each Wafer) Method 1019, 4 Samples/Wafer, 0 Rejects 100% Nondestructive Bond Pull, Method 2023 Sample - Wire Bond Pull Monitor, Method ...
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Propagation Delay Timing Diagram and Load Circuit VIH INPUT VS VSS TPLH VOH VS OUTPUT VOL Transition Timing Diagram TTLH VOH 80% 20% OUTPUT VOL Pulse Width, Setup, Hold Timing Diagram and Load Circuit D INPUT VIH VS VIL TH ...
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Die Characteristics DIE DIMENSIONS mils 2.25 x 2.24mm METALLIZATION: Type: SiAl Å Å Metal Thickness: 11k 1k GLASSIVATION: Type: SiO 2 Å Å Thickness: 13k 2.6k WORST CASE CURRENT DENSITY <2 A/cm BOND ...
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All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, ...