HS-3000 BOSER [BOSER Technology Co., Ltd], HS-3000 Datasheet - Page 38

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HS-3000

Manufacturer Part Number
HS-3000
Description
386 ISA Bus SBC
Manufacturer
BOSER [BOSER Technology Co., Ltd]
Datasheet
4.6
This section allows you to configure the system based on the specific
features of the installed chipset. This chipset manages bus speeds and
the access to the system memory resources, such as DRAM and the
external cache. It also coordinates the communications between the
conventional ISA and PCI buses. It must be stated that these items
should never be altered. The default settings have been chosen
because they provide the best operating conditions for your system.
You might consider and make any changes only if you discover that the
data has been lost while using your system.
32
AT Bus Clock
Slow Refresh (us)
Memory Hole At 15-16M
RAS Precharge time
RAS Active Time Insert Wait
CAS Precharge Time Insert Wait
Memory Write Insert Wait
Memory Miss Read Insert Wait
ISA Write cycle end Insert Wait
I/O Recovery
I/O Recovery Period
On-Chip I/O Recovery
16Bit ISA Insert Wait
Advanced Chipset Setup
(C)1999 American Megatrends, Inc. All Rights Reserved
AMIBIOS SETUP – ADVANCED CHIPSET SETUP
14.318/2
120
Disabled
3.5T
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
0.75 us
Disabled
Enabled
Available Options:
ESC:Exit
PgUp/PgDn: Modify
F1:Help
Disabled
Enabled
F2/F3:Color
:Sel

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