K6R1008C1D SAMSUNG [Samsung semiconductor], K6R1008C1D Datasheet - Page 9

• Manufacturer Part Number: K6R1008C1D
• Description: 64Kx16 Bit High-Speed CMOS Static RAM(3.3V Operating) Operated at Commercial and Industrial Temperature Ranges.
• Manufacturer: SAMSUNG [Samsung semiconductor]

FUNCTIONAL DESCRIPTION
* X means Don t Care
K6R1016V1D
TIMING WAVEFORM OF WRITE CYCLE(4)
CS
H
L
L
L
L
Data in
Data out
Address
CS
UB, LB
WE
WE
H
H
X
X
L
.
NOTES(WRITE CYCLE)
1. All write cycle timing is referenced from the last valid address to the first transition address.
2. A write occurs during the overlap of a low CS, WE, LB and UB. A write begins at the latest transition CS going low and WE
3. t
4. t
5. t
6. If OE, CS and WE are in the Read Mode during this period, the I/O pins are in the output low-Z state. Inputs of opposite phase
7. For common I/O applications, minimization or elimination of bus contention conditions is necessary during read and write cycle.
8. If CS goes low simultaneously with WE going or after WE going low, the outputs remain high impedance state.
9. Dout is the read data of the new address.
10. When CS is low: I/O pins are in the output state. The input signals in the opposite phase leading to the output should not be
going low; A write ends at the earliest transition CS going high or WE going high. t
to the end of write.
of the output must not be applied because bus contention can occur.
CW
AS
WR
applied.
is measured from the address valid to the beginning of write.
OE
is measured from the later of CS going low to end of write.
is measured from the end of write to the address change. t
X*
H
X
L
X
High-Z
LB
X
X
H
H
H
L
L
L
L
High-Z
UB
X
X
H
H
H
L
L
L
L
t
AS(4)
Not Select
Output Disable
Read
Write
(UB, LB Controlled)
t
BLZ
Mode
- 9 -
t
WHZ(6)
t
AW
t
CW(3)
t
WC
t
BW
WR
I/O
t
WP(2)
applied in case a write ends as CS or WE going high.
High-Z
High-Z
High-Z
High-Z
D
D
1
D
D
OUT
OUT
~I/O
IN
IN
t
DW
8
Valid Data
I/O Pin
WP
t
WR(5)
is measured from the beginning of write
I/O
t
High-Z
High-Z
High-Z
High-Z
DH
D
D
9
D
D
~I/O
OUT
OUT
IN
IN
CMOS SRAM
High-Z(8)
16
for AT&T
Supply Current
I
Revision 3.0
SB
I
I
I
June 2002
, I
CC
CC
CC
SB1