K7R643682M SAMSUNG [Samsung semiconductor], K7R643682M Datasheet - Page 14

• Manufacturer Part Number: K7R643682M
• Description: 2Mx36 & 4Mx18 & 8Mx9 QDRTM II b2 SRAM
• Manufacturer: SAMSUNG [Samsung semiconductor]

TIMING WAVE FORMS OF READ AND NOP
TIMING WAVE FORMS OF WRITE AND NOP
K7R643682M
K7R641882M
K7R640982M
Note: 1. Q1-1 refers to output from address A1+0, Q1-2 refers to output from address A1+1 i.e. the next internal burst address following A1+0.
Note: 1.D1-1 refers to input to address A1+0, D1-2 refers to input to address A1+1, i.e the next internal burst address following A1+0.
K
K
SA
R
Q(Data Out)
C
C
CQ
CQ
K
K
SA
W
D(Data In)
2. Outputs are disabled one cycle after a NOP.
2. BWx assumed active.
t
t
IVKH
IVKH
A1
D1-1
READ
t
KHIX
t
KHIX
t
t
KHKL
KHKL
t
KHKL
t
KHKH
t
D1-2
A1
KHKH
t
WRITE
KHKH
t
KLKH
t
KLKH
t
KLKH
A2
D2-1
READ
t
KHKH
t
KHKH
t
t
AVKH
KHKH
t
KHCH
D2-2
A2
2Mx36 & 4Mx18 & 8Mx9 QDR
WRITE
t
CHQX
t
t
CHQV
CHCQV
1
t
CHCQX
t
Q1-1
CQHQV
- 14 -
NOP
NOP
t
KHIX
t
CHQV
Q1-2
t
CHQX
t
CQHQX
t
AVKH
t
DVKH
D3-1
A3
Q2-1
t
READ
KHAX
t
CHCQV
t
D3-2
CHCQX
A3
Q2-2
t
WRITE
KHDX
t
KHAX
t
CHQZ
NOP
NOP
TM
Don t Care
Don t Care
Preliminary
II b2 SRAM
Oct. 2004
Undefined
Undefined
Q3-1
Rev 0.5