K6R4004C1C-C10 SAMSUNG [Samsung semiconductor], K6R4004C1C-C10 Datasheet
K6R4004C1C-C10
Related parts for K6R4004C1C-C10
K6R4004C1C-C10 Summary of contents
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... K6R4004C1C-C, K6R4004C1C-I, K6R4004C1C-E Document Title 1Mx4 Bit High Speed Static RAM(5V Operating). Operated at Extended and Industrial Temperature Ranges. Revision History Rev No. History Rev. 0.0 Initial release with Preliminary. Rev. 1.0 1.1 Removed Low power Version. 1.2 Removed Data Retention Characteristics 1.3 Changed I to 20mA SB1 Rev. 2.0 2 ...
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... I/O Compatible with 3.3V Device • Fully Static Operation - No Clock or Refresh required • Three State Outputs • Center Power/Ground Pin Configuration • Standard Pin Configuration K6R4004C1C-J : 32-SOJ-400 ORDERING INFORMATION K6R4004C1C-C10/C12/C15/C20 Commercial Temp. K6R4004C1C-E10/E12/E15/E20 Extended Temp. K6R4004C1C-I10/I12/I15/I20 Industrial Temp. FUNCTIONAL BLOCK DIAGRAM Clk Gen. ...
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... K6R4004C1C-C, K6R4004C1C-I, K6R4004C1C-E ABSOLUTE MAXIMUM RATINGS* Parameter Voltage on Any Pin Relative Voltage on V Supply Relative Power Dissipation Storage Temperature Operating Temperature Commercial Extended Industrial * Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied ...
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... K6R4004C1C-C, K6R4004C1C-I, K6R4004C1C-E AC CHARACTERISTICS ( TEST CONDITIONS* Parameter Input Pulse Levels Input Rise and Fall Times Input and Output timing Reference Levels Output Loads * The above test conditions are also applied at extended and industrial temperature range. Output Loads( ...
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... K6R4004C1C-C, K6R4004C1C-I, K6R4004C1C-E WRITE CYCLE* Parameter Symbol Write Cycle Time t WC Chip Select to End of Write t CW Address Set-up Time t AS Address Valid to End of Write t AW Write Pulse Width(OE High Write Pulse Width(OE Low) t WP1 Write Recovery Time t WR Write to Output High-Z ...
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... K6R4004C1C-C, K6R4004C1C-I, K6R4004C1C-E TIMING WAVEFORM OF WRITE CYCLE(1) Address High-Z Data in Data out TIMING WAVEFORM OF WRITE CYCLE(2) Address CS WE High-Z Data in Data out TIMING WAVEFORM OF WRITE CYCLE(3) Address CS WE High-Z Data in High-Z Data out (OE= Clock CW( AS(4) WP(2) t Valid Data ...
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... K6R4004C1C-C, K6R4004C1C-I, K6R4004C1C-E NOTES(WRITE CYCLE) 1. All write cycle timing is referenced from the last valid address to the first transition address write occurs during the overlap of a low CS and WE. A write begins at the latest transition CS going low and WE going low ; A write ends at the earliest transition CS going high or WE going high ...
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... K6R4004C1C-C, K6R4004C1C-I, K6R4004C1C-E PACKAGE DIMENSIONS 32-SOJ-400 #32 11.18 0.12 0.440 0.005 #1 +0.10 0.43 -0.05 0. +0.004 0.017 0.0375 -0.002 #17 #16 21.36 MAX 0.841 20.95 0.12 0.825 0.005 1.30 ( 0.051 1.30 ( 0.051 +0.10 0.71 -0.05 1.27 +0.004 0.028 0.050 -0.002 - 8 - PRELIMINARY CMOS SRAM Units:millimeters/Inches 9.40 0.25 0.370 0.010 +0.10 0.20 -0.05 +0.004 0.008 -0.002 0.69 MIN 0.027 ) 0.10 3.76 MAX MAX 0.004 ) 0.148 Rev 3.0 March 2000 ...