H57V2562GFR-60C HYNIX [Hynix Semiconductor], H57V2562GFR-60C Datasheet - Page 14

no-image

H57V2562GFR-60C

Manufacturer Part Number
H57V2562GFR-60C
Description
256Mb Synchronous DRAM based on 4M x 4Bank x16 I/O
Manufacturer
HYNIX [Hynix Semiconductor]
Datasheet
COMMAND TRUTH TABLE
Note : 1. Exiting Self Refresh occurs by asynchronously bringing CKE from low to high.
Rev 1.0 / Aug. 2009
Mode Register Set
No Operation
Device Deselect
Bank Active
Read
Read with Autoprecharge
Write
Write with Autoprecharge
Precharge All Banks
Precharge selected Bank
Burst stop
DQM
Auto Refresh
Burst-Read Single-Write
Self Refresh Entry
Self Refresh Exit
Precharge Power Down
Entry
Precharge Power Down Exit
Clock Suspend Entry
Clock Suspend Exit
2. see to Next page (DQM TRUTH TABLE)
Function
CKEn-1
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
CKEn
H
H
H
H
X
X
X
X
X
X
X
X
X
X
X
X
X
L
L
L
CS
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
RAS
H
H
H
H
H
H
H
H
H
X
X
X
X
X
V
L
L
L
L
L
L
L
X
X
CAS
H
X
H
H
X
H
X
H
X
H
X
V
L
L
L
L
L
L
L
L
H
H
Synchronous DRAM Memory 256Mbit
WE
H
H
H
H
H
H
H
H
H
H
X
X
X
X
X
V
L
L
L
L
L
L
DQM
X
X
X
X
X
X
X
X
X
X
V
X
X
X
X
X
X
X
X
(Other Pins OP code)
ADDR
Row Address
umn
umn
umn
umn
H57V2562GFR Series
Col-
Col-
Col-
Col-
X
X
A9 Pin High
Op Code
A10
/AP
X
X
X
X
X
X
X
X
X
X
X
H
H
H
L
L
L
BA
V
V
V
V
V
X
V
Note
2
1
14

Related parts for H57V2562GFR-60C