H55S1G22MFP-60 HYNIX [Hynix Semiconductor], H55S1G22MFP-60 Datasheet - Page 7

• Manufacturer Part Number: H55S1G22MFP-60
• Description: 1Gb (32Mx32bit) Mobile SDRAM
• Manufacturer: HYNIX [Hynix Semiconductor]

BALL DESCRIPTION
Rev 1.2 / Jun. 2008
DQM0 ~ DQM3
RAS, CAS, WE
DQ0 ~ DQ31
VDDQ/VSSQ
SYMBOL
A0 ~ A13
BA0, BA1
VDD/VSS
CKE
CLK
NC
CS
SUPPLY
SUPPLY
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
TYPE
I/O
-
Clock : The system clock input. All other inputs are registered to the SDRAM on the
rising edge of CLK
Clock Enable : Controls internal clock signal and when deactivated, the SDRAM will
be one of the states among power down, suspend or self refresh
Chip Select : Enables or disables all inputs except CLK, CKE, DQM0~DQM3
Bank Address : Selects bank to be activated during RAS activity
Selects bank to be read/written during CAS activity
For 2KBytes Page Size, Row Address : A0~A13 / Column Address : A0~A8
For 4KBytes Page Size, Row Address : A0~A12 / Column Address : A0~A9
Auto-precharge flag : A10
Command Inputs : RAS, CAS and WE define the operation
Refer function truth table for details
Data Mask:Controls output buffers in read mode and masks input data in write
mode
Data Input/Output:Multiplexed data input/output pin
Power supply for internal circuits
Power supply for output buffers
No connection
1Gbit (32Mx32bit) Mobile SDR Memory
DESCRIPTION
H55S1G(2/3)2MFP Series
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