HM1-6514B-9 INTERSIL [Intersil Corporation], HM1-6514B-9 Datasheet
HM1-6514B-9
Available stocks
Related parts for HM1-6514B-9
HM1-6514B-9 Summary of contents
Page 1
... Fast Access Time 120/200ns Max • 18 Pin Package for High Density • On-Chip Address Register • Gated Inputs - No Pull Up or Pull Down Resistors Required Ordering Information 120ns 200ns HM3-6514S-9 HM3-6514B-9 HM1-6514S-9 HM1-6514B-9 24502BVA - 8102402VA 8102404VA - - - - Pinouts HM-6514 (PDIP, CERDIP) TOP VIEW ...
Page 2
Functional Diagram LSB LSB HM-6514 A 6 LATCHED GATED ADDRESS ROW 64 MATRIX A REGISTER DECODER ...
Page 3
Absolute Maximum Ratings Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
Page 4
AC Electrical Specifications V CC SYMBOL PARAMETER (1) TELQV Chip Enable Access Time (2) TAVQV Address Access Time (3) TELQX Chip Enable Output Enable Time (4) TEHQZ Chip Enable Output Disable Time (5) TELEH Chip Enable Pulse Negative Width (6) ...
Page 5
Timing Waveforms (7) TAVEL A VALID ADD (6) TEHEL E HIGH TIME REFERENCE -1 0 INPUTS TIME REFERENCE The address information is latched in the ...
Page 6
Timing Waveforms (Continued) TAVEL A VALID ADD TEHEL E W HIGH Z DQ TIME REFERENCE -1 INPUTS TIME REFERENCE The write cycle is initiated by the falling edge ...
Page 7
Test Load Circuit DUT (NOTE 1) C NOTE: 1. Test head capacitance. All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make ...