EM78159NAS EMC [ELAN Microelectronics Corp], EM78159NAS Datasheet - Page 38

• Manufacturer Part Number: EM78159NAS
• Description: 8-Bit Microcontroller with OTP ROM
• Manufacturer: EMC [ELAN Microelectronics Corp]

EM78P159N
8-Bit Microcontrollerwith OTP ROM
34 •
4.12 Instruction Set
Each instruction in the instruction set is a 13-bit word divided into an OP code and one
or more operands. Normally, all instructions are executed within one single instruction
cycle (one instruction consists of 2 oscillator periods), unless the program counter is
changed by instruction "MOV R2,A", "ADD R2,A", or by instructions of arithmetic or
logic operation on R2 (e.g., "SUB R2,A", "BS(C) R2,6", "CLR R2", ⋅⋅⋅⋅). In this case, the
execution takes two instruction cycles.
If for some reasons, the specification of the instruction cycle is not suitable for certain
applications, try modifying the instruction as follows:
(A) Change one instruction cycle to consist of 4 oscillator periods.
(B) "JMP," "CALL," "RET," "RETL," "RETI," or the conditional skip ("JBS," "JBC," "JZ,"
Case (A) is selected by the CODE Option bit, called CLK. One instruction cycle
consists of two oscillator clocks if CLK is low, and four oscillator clocks if CLK is high.
Note that once the 4 oscillator periods within one instruction cycle is selected as in
Case (A), the internal clock source to TCC should be CLK=Fosc/4, instead of Fosc/ 2.
Moreover, the instruction set has the following features:
1) Every bit of any register can be set, cleared, or tested directly.
2) The I/O register can be regarded as general register. That is, the same instruction
The following symbols are used in the following Instruction Set table:
R represents a register designator that specifies which one of the registers (including
b represents a bit field designator that selects the value for the bit which is located in
K represents an 8 or 10-bit constant or literal value.
operational registers and general purpose registers) is to be utilized by the
instruction.
the register "R", and affects operation.
can operate on I/O register.
"JZA," "DJZ,” "DJZA") commands which were tested to be true, are executed within
two instruction cycles. The instructions that are written to the program counter also
take two instruction cycles.
(This specification is subject to change without further notice)
Product Specification (V1.0) 03.10.2006