EM78468AQ EMC [ELAN Microelectronics Corp], EM78468AQ Datasheet - Page 20

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EM78468AQ

Manufacturer Part Number
EM78468AQ
Description
8-BIT Microcontroller
Manufacturer
EMC [ELAN Microelectronics Corp]
Datasheet
EM78468
8-BIT Microcontroller
16 •
4.1.14 RD/SBPCR (System, Booster and PLL Control Register)
Bit 7: Not used
Bit 6 ~ 4 (CLK2 ~ CLK0): main clock selection bits for PLL mode (code option select)
Bit 3 (IDLE): idle mode enable bit. This bit will decide the intended mode of the SLEP
instruction.
IDLE=”0”+SLEP instruction => sleep mode
IDLE=”1”+SLEP instruction => idle mode
* NOP instruction must be added after SLEP instruction.
Example: IDLE mode: IDLE bit = “1” +SLEP instruction + NOP instruction
Bit 2 ~ 1 (BF1 ~ BF0): LCD booster frequency select bit to adjust VLCD 2,3 driving.
Bit 0 (CPUS): CPU oscillator source select, When CPUS=0, the CPU oscillator select
sub-oscillator and the main oscillator is stopped.
CLK2
Bit 7
0
0
0
0
1
--
CNT1EN = “1”: Enable Counter 1. Count operation start.
(Address: 0Dh)
CPUS = “0”: sub-oscillator (Fs)
CPUS = “1”: main oscillator (Fm)
BF1
0
0
1
1
CLK1
SLEEP mode: IDLE bit = “0” +SLEP instruction + NOP instruction
CLK2
Bit 6
X
0
0
1
1
CLK0
CLK1
Bit 5
X
0
1
0
1
BF0
0
1
0
1
CLK0
Fs*130
Fs*65
Fs*65/2
Fs*65/4
Fs*244
Bit 4
Main clock
(This specification is subject to change without further notice)
Booster frequency
IDLE
Bit 3
Product Specification (V1.1) 04.11.2005
Fs
Fs/4
Fs/8
Fs/16
Example Fs=32.768K
Bit 2
BF1
4.26 MHz
2.13 MHz
1.065 MHz
532 KHz
8 MHz
Bit 1
BF0
CPUS
Bit 0

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