EM78468AQ EMC [ELAN Microelectronics Corp], EM78468AQ Datasheet - Page 21
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EM78468AQ
Manufacturer Part Number
EM78468AQ
Description
8-BIT Microcontroller
Manufacturer
EMC [ELAN Microelectronics Corp]
Datasheet
1.EM78468AQ.pdf
(71 pages)
- Current page: 21 of 71
- Download datasheet (900Kb)
Product Specification (V1.1) 04.11.2005
(This specification is subject to change without further notice)
CPU Operation Mode
4.1.15 RE/IRCR (IR and PORT 5 Setting Control Register)
it must delay a little times for the main
oscillation stable w hile your system timing
control is conscientious
Fm:stop
Fs: stop
CPU: stop
SLEEP Mode
Bit 7 (IRE): Infrared Remote Enable bit
Bit 6 (HF): High carry frequency.
Bit 5 (LGP): IROUT for long time of low pulse.
Bit 4: Not used
The w ake up time from sleep to green mode is
approximately sub-oscillator setup time +18ms+16*1/fs
Bit 7
IRE
(Address: 0Eh)
IRE = “0”: Disable IR/PWM function. The state of P5.7/IROUT pin is determined
by bit 7 of IOC50 if it’s for IROUT.
IRE = “1”: Enable IR or PWM function.
HF = “0”: For PWM application, disable H/W modulator function. IROUT
waveform is created according to high-pulse and low-pulse time as determined by
the high pulse and low pulse width timers respectively. The counter 2 is an
independent auto reload timer.
HF = “1”: For IR application mode, enable H/W modulator function, the low time
sections of the generated pulse is modulated with the frequency Fcarrier. The
frequency of Fcarrier provide by counter 2.
LGP = “0”: The high-pulse width timer register and low-pulse width timer is valid.
LGP = “1”: The high-pulse width timer register is ignored. So the IROUT
waveform is dependent on low-pulse width timer register only.
Bit 6
HF
Wake up
IDLE="0"
SLEP
Bit 5
LGP
CPUS="1"
Fig. 5 CPU Operation Mode
fm:stop
fs: oscillation
CPU: using fs
fm:oscillation
fs: oscillation
CPU: using fosc
Normal Mode
Green Mode
Bit 4
--
IROUTE
CPUS="0"
Bit 3
Code option
HLFS=1
IDLE="1"
SLEP
w ake up
The w ake up time from idle to green
mode is 16*1/fs
TCCE
Bit 2
8-BIT Microcontroller
RESET
EINT1
Code option
HLFS=0
fm:stop
fs: oscillation
CPU: stop
Bit 1
IDLE Mode
EM78468
EINT0
Bit 0
• 17
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