HY5DU283222AF-5 HYNIX [Hynix Semiconductor], HY5DU283222AF-5 Datasheet - Page 23

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HY5DU283222AF-5

Manufacturer Part Number
HY5DU283222AF-5
Description
128M(4Mx32) GDDR SDRAM
Manufacturer
HYNIX [Hynix Semiconductor]
Datasheet
AC OPERATING CONDITIONS
Note :
1. VID is the magnitude of the difference between the input level on CK and the input on /CK.
2. The value of VIX is expected to equal 0.5*V
AC OPERATING TEST CONDITIONS
Rev. 0.7 / Jun. 2004
Input High (Logic 1) Voltage, DQ, DQS and DM signals
Input Low (Logic 0) Voltage, DQ, DQS and DM signals
Input Differential Voltage, CK and /CK inputs
Input Crossing Point Voltage, CK and /CK inputs
Reference Voltage
Termination Voltage
AC Input High Level Voltage (V
AC Input Low Level Voltage (V
Input Timing Measurement Reference Level Voltage
Output Timing Measurement Reference Level Voltage
Input Signal maximum peak swing
Input minimum Signal Slew Rate
Termination Resistor (R
Series Resistor (R
Output Load Capacitance for Access Time Measurement (C
S
)
Parameter
T
)
Parameter
IL
IH
, max)
, min)
DDQ
(TA=0 to 70
of the transmitting device and must track variations in the DC level of the same.
(TA=0 to 70
o
Symbol
V
V
C, Voltage referenced to V
V
V
L
IH(AC)
ID(AC)
IL(AC)
IX(AC)
)
o
C, Voltage referenced to VSS = 0V)
0.5*V
V
REF
Min
0.7
DDQ
+ 0.35
-0.2
V
V
V
V
REF
DDQ
DDQ
REF
SS
Value
V
V
1.5
50
25
30
REF
+ 0.35
1
= 0V)
TT
0.5*V
- 0.35
x 0.5
x 0.5
V
V
DDQ
REF
Max
DDQ
- 0.35
+ 0.6
+0.2
HY5DU283222AF
Unit
V
V
V
V
Unit
V/ns
pF
V
V
V
V
V
V
V
Note
1
2
23

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