AT-320240Q5FIQW ZETTLER [ZETTLER Electronics], AT-320240Q5FIQW Datasheet - Page 8
AT-320240Q5FIQW
Manufacturer Part Number
AT-320240Q5FIQW
Description
SPECIFICATIONS FOR LCD MODULE
Manufacturer
ZETTLER [ZETTLER Electronics]
Datasheet
1.AT-320240Q5FIQW.pdf
(17 pages)
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DB0~DB7
DB0~DB7
/WR,/RD
7 TIMING CHARACTERISTICS
(Write)
(Read)
A0,/CS
Date : 2006/9/12
7.1
Note: For memory control and system control commands:
Address Hold Time
Address Setup Time
System Cycle Time
Strobe Pulse Width
Data Setup Time
Data Hold Time
/RD Access Time
Output Disable Time
tCYC8=2tC+tOC+tCEA+75 > tACV +245
For all other commands:
tCYC8=4tC+tOC+30
8080 Family Interface Timing
Parameter
VDD=2.7~4.5
CL=100 pF
Condition
AMPIRE CO., LTD.
Symbol
tACC8
tAW8
tCYC
tAH8
tDH8
tOH8
tDS8
tOC
Note
Min
150
120
10
10
0
5
-
Max
80
55
Unit
ns
ns
ns
ns
ns
ns
ns
ns
DB0~DB7
/WR,/RD
Remark
A0,/CS
8
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