EP910 ALTERA [Altera Corporation], EP910 Datasheet - Page 20

• Manufacturer Part Number: EP910
• Description: The Altera Classic device family offers a solution to high-speed, lowpower logic integration. Fabricated on advanced CMOS technology
• Manufacturer: ALTERA [Altera Corporation]

Classic EPLD Family Data Sheet
764
t
t
t
t
t
f
t
t
t
t
t
t
f
t
t
t
t
t
t
t
f
Symbol
PD1
PD2
PZX
PXZ
CLR
MAX
SU
H
CH
CL
CO1
CNT
CNT
ASU
AH
ACH
ACL
ODH
ACO1
ACNT
ACNT
Table 12. EP610I External Timing Parameters
Input to non-registered output
I/O input to non-registered output
Input to output enable
Input to output disable
Asynchronous output clear time
Maximum frequency
Global clock input setup time
Global clock input hold time
Global clock high time
Global clock low time
Global clock to output delay
Global clock minimum period
Maximum internal global clock
frequency
Array clock input setup time
Array clock input hold time
Array clock high time
Array clock low time
Output data hold time after clock C1 = 35 pF
Array clock to output delay
Array clock minimum period
Maximum internal array clock
frequency
Parameter
Tables 12
and
C1 = 35 pF
C1 = 5 pF
C1 = 35 pF
(5)
(6)
(7)
(6)
Conditions EP610I-10 EP610I-12 EP610I-15 Non-Turbo
13
show the timing parameters for EP610I devices.
(4)
Notes
125.0
100.0
100.0
Min Max Min Max Min Max
7.0
0.0
5.0
5.0
1.5
5.5
5.0
5.0
1.0
(1),
10.0
10.0
15.0
13.0
13.0
10.0
12.0
10.0
6.5
(2)
100.
83.3
83.3
9.0
0.0
5.0
5.0
3.0
6.0
5.0
5.0
1.0
0
12.0
12.0
15.0
15.0
15.0
12.0
14.0
12.0
8.0
83.3
12.0
66.0
66.0
0.0
5.0
5.0
4.0
6.0
6.0
6.0
1.0
15.0
15.0
18.0
18.0
18.0
15.0
16.0
15.0
8.0
Altera Corporation
Adder
25.0
25.0
25.0
25.0
25.0
25.0
25.0
25.0
25.0
(3)
0.0
0.0
0.0
0.0
0.0
0.0
0.0
0.0
0.0
0.0
25
Unit
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns